公开(公告)号：US08203082B2

公开(公告)日：2012-06-19

申请号：US12272797

申请日：2008-11-18

申请人： Yu-Chang Pai ,  Shou-Kuo Hsu ,  Chien-Hung Liu ,  Ying-Tso Lai

发明人： Yu-Chang Pai ,  Shou-Kuo Hsu ,  Chien-Hung Liu ,  Ying-Tso Lai

IPC分类号： H05K1/11

CPC分类号： H05K1/116 ,  H05K1/0245 ,  H05K1/0251 ,  H05K1/165 ,  H05K3/429 ,  H05K2201/09236 ,  H05K2201/09281 ,  H05K2201/09636

摘要： A printed circuit board includes a first layout layer, a second layout layer, a copper foil layer, a first via and a second via. The first layout layer has a first signal line and a second signal line, each of which has a curved first portion. The second layout layer has a third signal line and a fourth signal line, each of which also has a curved first portion. The curved first portions of the first signal line, the second signal line, the third signal line and the fourth signal line are coupled to the first via and the second via. In this case, the curved first portions of the first signal line, the second signal line, the third signal line and the fourth signal line cooperatively generate spiral inductance characteristic.

摘要翻译： 印刷电路板包括第一布局层，第二布局层，铜箔层，第一通孔和第二通孔。 第一布局层具有第一信号线和第二信号线，每条信号线都具有弯曲的第一部分。 第二布局层具有第三信号线和第四信号线，每条信号线还具有弯曲的第一部分。 第一信号线，第二信号线，第三信号线和第四信号线的弯曲的第一部分耦合到第一通孔和第二通孔。 在这种情况下，第一信号线，第二信号线，第三信号线和第四信号线的弯曲的第一部分协同地产生螺旋电感特性。

公开(公告)号：US07925999B2

公开(公告)日：2011-04-12

申请号：US12140325

申请日：2008-06-17

申请人： Ying-Tso Lai ,  Chien-Hung Liu ,  Shou-Kuo Hsu

发明人： Ying-Tso Lai ,  Chien-Hung Liu ,  Shou-Kuo Hsu

IPC分类号： G06F17/50

CPC分类号： H05K3/0005 ,  G06F17/5077 ,  H05K1/0263 ,  H05K1/116 ,  H05K3/429 ,  H05K2201/09309 ,  H05K2201/09718

摘要： A design method of printed circuit boards includes the following steps. First, simulate a printed circuit board including power layers, and vias connected to all the power layers. Then, change connections of the vias that tend to draw too much current to be connected to fewer power layers, than the vias that tend to draw less current. Repeat adjusting connections of the vias until all vias draw a similar amount of current such that no via draws more current than an upper limit the vias are designed for. Finally, according to the results, design/fabricate a PCB with vias respectively insulated, as needed, from the power layers that do not need to be connected to the vias.

摘要翻译： 印刷电路板的设计方法包括以下步骤。 首先，模拟包括电源层的印刷电路板和连接到所有电源层的通孔。 然后，改变通常将过多电流连接到更少功率层的通孔的连接，而不是倾向于减少电流的通孔。 重复调整通孔的连接，直到所有通孔绘制相似的电流量，使得通孔不会超过通孔设计的上限。 最后，根据结果，根据需要，从不需要连接到通孔的电源层设计/制造通孔的PCB分别绝缘。

公开(公告)号：US08283994B2

公开(公告)日：2012-10-09

申请号：US12560445

申请日：2009-09-16

申请人： Shou-Kuo Hsu ,  Cheng-Hsien Lee ,  Ying-Tso Lai ,  Hsiao-Yun Su ,  Jia-Chi Chen

发明人： Shou-Kuo Hsu ,  Cheng-Hsien Lee ,  Ying-Tso Lai ,  Hsiao-Yun Su ,  Jia-Chi Chen

IPC分类号： H03H7/38

CPC分类号： H04L25/0272

摘要： A differential signal transmission device transmits N differential signal pairs from a differential signal generator to a number of receiving terminals. The N differential signal pairs include N positive signals and N negative signals. The N positive signals are clustered at a first positive clustering point. The first positive clustering point is connected to a second positive clustering point via a first matching resistor. The second positive clustering point is grounded via a first grounding resistor, and outputs a number of positive signals to the number of receiving terminals respectively. The N negative signals are clustered at a first negative clustering point. The first negative clustering point is connected to a second negative clustering point via a second matching resistor. The second negative signal clustering point is grounded via a second grounding resistor, and outputs a number of negative signals to the number of receiving terminals respectively.

摘要翻译： 差分信号传输装置将差分信号发生器的N个差分信号对发送到多个接收终端。 N个差分信号对包括N个正信号和N个负信号。 N个正信号聚集在第一个正聚类点。 第一正聚集点通过第一匹配电阻连接到第二正聚集点。 第二个正聚集点通过第一接地电阻接地，并分别输出多个正信号到接收端的数量。 N个负信号聚集在第一个负聚类点。 第一负聚集点通过第二匹配电阻器连接到第二负聚集点。 第二负信号聚簇点通过第二接地电阻接地，并分别输出多个负信号至接收端数。

公开(公告)号：US08089007B2

公开(公告)日：2012-01-03

申请号：US12331444

申请日：2008-12-10

申请人： Ying-Tso Lai ,  Tsung-Sheng Huang ,  Shou-Kuo Hsu

发明人： Ying-Tso Lai ,  Tsung-Sheng Huang ,  Shou-Kuo Hsu

IPC分类号： H05K1/11

CPC分类号： H05K1/0265 ,  H05K1/114 ,  H05K1/115 ,  H05K2201/094 ,  H05K2201/0979 ,  H05K2201/09854 ,  H05K2201/10189

摘要： A printed circuit board includes a reference layer, at least one first hole defined in the reference layer and adjacent from a first pin in a first column of pins of an electronic component, and at least one second hole defined in the reference layer and adjacent from a second pin of the electronic component. The at least one second hole is defined in the reference layer and opposite to the at least one first hole. The second pin is in a neighboring second column of pins from the first column of pins. A diameter of the at least one first hole is greater than a diameter of the at least one second hole such that a difference in current flowing through the first pin and the second pin is reduced.

摘要翻译： 印刷电路板包括参考层，限定在参考层中并与电子部件的第一列销中的第一销相邻的至少一个第一孔以及限定在参考层中并与参考层相邻的至少一个第二孔 电子部件的第二引脚。 至少一个第二孔限定在参考层中并与至少一个第一孔相对。 第二引脚位于与第一列引脚相邻的第二列引脚中。 所述至少一个第一孔的直径大于所述至少一个第二孔的直径，使得流过所述第一销和所述第二销的电流差减小。

公开(公告)号：US07945889B2

公开(公告)日：2011-05-17

申请号：US12172258

申请日：2008-07-13

申请人： Shou-Kuo Hsu ,  Ying-Tso Lai ,  Duen-Yi Ho

发明人： Shou-Kuo Hsu ,  Ying-Tso Lai ,  Duen-Yi Ho

IPC分类号： G06F17/50 ,  G06F9/455 ,  G06F11/22

CPC分类号： G06F17/5036

摘要： A computer-implemented method for designing a voltage regulator module (VRM) is disclosed. The method includes receiving design parameters and a component data for each component and storing the design parameters and the component data for each component into a component selection table, calculating a work efficiency of the VRM, and storing the work efficiency into a power computation table. The method further includes simulating a derating of each component according to a corresponding rated stress of each component if the work efficiency is greater than or equal to a predetermined work efficiency, calculating a stress ratio of each component, and storing the stress ratio into a component derating table. The component selection table, the power computation table and the component derating table are stored to form a desired VRM model if the stress ratio of each component meets a corresponding derating specification.

摘要翻译： 公开了一种用于设计电压调节器模块（VRM）的计算机实现的方法。 该方法包括接收每个组件的设计参数和组件数据，并将每个组件的设计参数和组件数据存储到组件选择表中，计算VRM的工作效率，并将工作效率存储在功率计算表中。 该方法还包括如果工作效率大于或等于预定工作效率，则计算每个部件的应力比，并将应力比存储到部件中，根据每个部件的相应额定应力模拟每个部件的降额 降额表。 存储组件选择表，功率计算表和组件降额表，以形成所需的VRM模型，如果每个组件的应力比满足相应的降额规范。

公开(公告)号：US08272141B2

公开(公告)日：2012-09-25

申请号：US12784511

申请日：2010-05-21

申请人： Shen-Chun Li ,  Shou-Kuo Hsu ,  Hsien-Chuan Liang ,  Ying-Tso Lai

发明人： Shen-Chun Li ,  Shou-Kuo Hsu ,  Hsien-Chuan Liang ,  Ying-Tso Lai

IPC分类号： G01B5/00 ,  G01B5/02 ,  G01B21/02

CPC分类号： G01B3/20 ,  Y10T74/19698

摘要： An exemplary probe apparatus includes a fixture, a first probe assembly, a motor, a lead screw, two guide members, a second probe, and a reduction gear unit. The first probe assembly is fixedly attached to the fixture and includes a first probe. The motor has a drive shaft attached to the fixture. The lead screw is coupled to the fixture. The two guide members are attached to the fixture and parallel to the lead screw. The second probe assembly is moveably attached to the lead screw and the at least one guide member, and includes a second probe. The reduction gear unit is coupled to the drive shaft and the lead screw to transmit power from the motor to the second probe assembly through the lead screw. The second probe assembly is configured for moving the second probe towards or away from the first probe along the two guide members.

摘要翻译： 示例性探针装置包括固定装置，第一探针组件，马达，导螺杆，两个引导构件，第二探针和减速装置。 第一探针组件固定地附接到固定装置并且包括第一探针。 电动机具有连接到固定装置的驱动轴。 导螺杆联接到固定装置。 两个引导构件连接到夹具并平行于导螺杆。 第二探针组件可移动地附接到导螺杆和至少一个引导构件，并且包括第二探针。 减速齿轮单元联接到驱动轴和导螺杆，以将动力从马达通过丝杠传递到第二探针组件。 第二探针组件被构造成沿着两个引导构件将第二探针朝向或远离第一探头移动。

公开(公告)号：US07992124B2

公开(公告)日：2011-08-02

申请号：US12257366

申请日：2008-10-23

申请人： Ying-Tso Lai ,  Tsung-Sheng Huang ,  Shou-Kuo Hsu

发明人： Ying-Tso Lai ,  Tsung-Sheng Huang ,  Shou-Kuo Hsu

IPC分类号： G06F17/50 ,  G06F9/455

CPC分类号： G06F17/5063 ,  G06F2217/10

摘要： A system for optimizing analog circuit designs includes an input device, a data processing device, and a data storage device. The data processing device includes a selecting module, a calculation module, and a determining module. The selecting module is for receiving input from the input device and selecting electronic components composing the circuit from the data storage device. The calculation module is for calculating average values and standard deviations of each electronic component, generating normal distribution samples of each electronic component, and calculating output voltages of the circuit. The determining module is for determining whether the circuit meets a process capability standard.

摘要翻译： 用于优化模拟电路设计的系统包括输入装置，数据处理装置和数据存储装置。 数据处理装置包括选择模块，计算模块和确定模块。 选择模块用于从输入设备接收输入，并从数据存储设备中选择构成电路的电子元件。 计算模块用于计算每个电子部件的平均值和标准偏差，产生每个电子部件的正态分布样本，以及计算电路的输出电压。 确定模块用于确定电路是否满足过程能力标准。

公开(公告)号：US07808338B1

公开(公告)日：2010-10-05

申请号：US12425394

申请日：2009-04-17

申请人： Hsiao-Yun Su ,  Ying-Tso Lai ,  Shou-Kuo Hsu

发明人： Hsiao-Yun Su ,  Ying-Tso Lai ,  Shou-Kuo Hsu

IPC分类号： H01P5/04

CPC分类号： H05K1/0246 ,  H05K2201/044 ,  H05K2201/09727

摘要： A circuit topology for multiple loads includes a driving terminal for transmitting a driving signal, a number of transmitting lines, and a number of loads operable to receive the driving signal from the driving terminal. The number of loads are connected to the driving terminal one by one via the number of transmitting lines. Two transmitting lines of the number of transmitting lines, which are nearest and farthest respectively from the driving terminal, are both greater than widths of the other transmitting lines.

摘要翻译： 用于多个负载的电路拓扑包括用于发送驱动信号的驱动端子，多个发送线路和可操作以从驱动端子接收驱动信号的多个负载。 负载数量通过传输线数量逐个连接到驱动端子。 距离驱动终端最近和最远的发送线数目的两条发送线都大于其他发送线的宽度。

公开(公告)号：US20080000677A1

公开(公告)日：2008-01-03

申请号：US11309921

申请日：2006-10-27

申请人： Ying-Tso Lai ,  Yu-Chang Pai ,  Shou-Kuo Hsu

发明人： Ying-Tso Lai ,  Yu-Chang Pai ,  Shou-Kuo Hsu

IPC分类号： H01R12/00

CPC分类号： H05K1/0216 ,  H05K1/0265 ,  H05K2201/09336 ,  H05K2201/0969 ,  H05K2201/0979

摘要： A printed circuit board (PCB) includes at least one power trace. A plurality of etched portions are defined in the at least one power trace, acting as electromagnetic bandgaps for transferring resonant frequencies produced around the at least one power trace to avoid working frequencies of the PCB, thereby reducing power noise around the at least one power trace.

摘要翻译： 印刷电路板（PCB）至少包括一个电源线。 在所述至少一个电力轨迹中限定多个蚀刻部分，用作电磁带隙，用于传送围绕所述至少一个电力轨迹产生的谐振频率，以避免PCB的工作频率，从而降低所述至少一个电力迹线周围的功率噪声 。

公开(公告)号：US08058557B2

公开(公告)日：2011-11-15

申请号：US11957416

申请日：2007-12-15

申请人： Chien-Hung Liu ,  Shou-Kuo Hsu ,  Chia-Nan Pai

发明人： Chien-Hung Liu ,  Shou-Kuo Hsu ,  Chia-Nan Pai

IPC分类号： H05K1/00

CPC分类号： H05K1/0245 ,  H05K2201/0715 ,  H05K2201/09236 ,  H05K2201/09672

摘要： An exemplary PCB includes a first reference layer, a first signal layer, a second signal layer, and a third signal layer in that order, a first differential pair is arranged in the first signal layer in edge-coupled structure and references the first reference layer, a distance between the first signal layer and the second signal layer is greater than a distance between the first reference layer and the first signal layer, a second differential pair is arranged in the second signal layer and the third signal layer in broad-coupled structure. The PCB has a high density layout of transmission lines.

摘要翻译： 示例性PCB包括第一参考层，第一信号层，第二信号层和第三信号层，第一差分对以边缘耦合结构布置在第一信号层中，并参考第一参考层 第一信号层和第二信号层之间的距离大于第一参考层和第一信号层之间的距离，第二差分对被布置在第二信号层中，第三信号层以广泛耦合结构 。 PCB具有传输线高密度布局。