公开(公告)号：US10103139B2

公开(公告)日：2018-10-16

申请号：US14792847

申请日：2015-07-07

Applicant: Xilinx, Inc.

Inventor： Nui Chong ,  Jae-Gyung Ahn ,  Ping-Chin Yeh ,  Cheang-Whang Chang

IPC: H01L29/00 ,  H01L23/62 ,  H01L27/07 ,  H01L23/522 ,  H01L27/06 ,  H01L49/02 ,  H01L21/283 ,  H01L21/76 ,  H01L27/02

Abstract: An integrated circuit structure includes: a semiconductor substrate; a shallow trench isolation (STI) region in the semiconductor substrate; one or more active devices formed on the semiconductor substrate; and a resistor array having a plurality of resistors disposed above the STI region; wherein the resistor array comprises a portion of one or more interconnect contact layers that are for interconnection to the one or more active devices.

公开(公告)号：US20170012041A1

公开(公告)日：2017-01-12

申请号：US14792847

申请日：2015-07-07

Applicant: Xilinx, Inc.

Inventor： Nui Chong ,  Jae-Gyung Ahn ,  Ping-Chin Yeh ,  Cheang-Whang Chang

IPC: H01L27/07 ,  H01L21/76 ,  H01L21/283 ,  H01L49/02 ,  H01L27/02

CPC classification number: H01L27/0738 ,  H01L21/283 ,  H01L21/76 ,  H01L23/5228 ,  H01L27/0207 ,  H01L27/0629 ,  H01L28/24

Abstract: An integrated circuit structure includes: a semiconductor substrate; a shallow trench isolation (STI) region in the semiconductor substrate; one or more active devices formed on the semiconductor substrate; and a resistor array having a plurality of resistors disposed above the STI region; wherein the resistor array comprises a portion of one or more interconnect contact layers that are for interconnection to the one or more active devices.

Abstract translation: 集成电路结构包括：半导体衬底; 在半导体衬底中的浅沟槽隔离（STI）区域; 形成在半导体衬底上的一个或多个有源器件; 以及具有设置在所述STI区域上方的多个电阻器的电阻器阵列; 其中所述电阻器阵列包括用于与所述一个或多个有源器件互连的一个或多个互连接触层的一部分。