公开(公告)号：US20190303328A1

公开(公告)日：2019-10-03

申请号：US15944617

申请日：2018-04-03

Applicant: Xilinx, Inc.

Inventor： Goran H.K. Balski ,  Juan J. Noguera Serra ,  David Clarke ,  Tim Tuan ,  Peter McColgan ,  Zachary Dickman ,  Baris Ozgul ,  Jan Langer

IPC: G06F13/40 ,  G06F13/16

Abstract: A device may include a plurality of data processing engines, a subsystem, and an SoC interface block coupled to the plurality of data processing engines and the subsystem. The SoC interface block may be configured to exchange data between the subsystem and the plurality of data processing engines.