公开(公告)号：US20250156617A1

公开(公告)日：2025-05-15

申请号：US18509189

申请日：2023-11-14

Applicant: Xilinx, Inc.

Inventor： Lin-Ya Yu ,  Alexandre Isoard ,  Hem C. Neema ,  Luciano Lavagno ,  Chen Qianqiao ,  Xu Yang

IPC: G06F30/3312 ,  G06F119/12

Abstract: Computer-based co-simulation includes simulating a circuit design and a co-simulation model configured to model circuitry that operates in coordination with a hardware implementation of the circuit design. In response to a request for a data transfer received by the co-simulation model from the circuit design, a ready signal is provided from the co-simulation model to the circuit design after a first predetermined number of simulation clock cycles corresponding to an initiation interval of the circuitry modeled by the co-simulation model. In response to receiving state information for the data transfer, a response from the co-simulation model is provided to the circuit design after a second predetermined number of simulation clock cycles corresponding to a response time of the circuitry modeled by the co-simulation model.