公开(公告)号：US10481711B2

公开(公告)日：2019-11-19

申请号：US15301245

申请日：2016-07-20

Applicant: Wuhan China Star Optoelectronics Technology Co., Ltd.

Inventor： Yao-li Huang ,  Hongsen Zhang ,  Pan Yang

IPC: G06F3/041 ,  G06F3/044

Abstract: An array substrate comprises the plurality of gate lines and matrix arranged touch electrodes, which each of the touch electrodes has a plurality of sub electrodes, and each of the sub electrode and the gate line extend along the first direction, the plurality of the sub electrode are arranged in spaced arrangement along the second direction. The first direction and the second direction are perpendicular each other, and the plurality of the sub electrodes electrically connected to each other by the first touch trace, and the shadow of the gate line on the touch electrode is between two of the sub electrodes. The touch electrode is separated into the plurality of sub electrode arranged in spaced arrangement. The shadow of the gate line on the touch electrode is between the two sub electrodes, and the touch electrode avoids the gate line.

公开(公告)号：US10473965B2

公开(公告)日：2019-11-12

申请号：US15737298

申请日：2017-10-20

Applicant: Wuhan China Star Optoelectronics Technology Co., Ltd.

Inventor： Lihua Zheng ,  Huanhuan Bu ,  Pan Yang

IPC: G02F1/1333 ,  G06F3/041 ,  G02F1/1362 ,  H01L29/786 ,  G02F1/1343 ,  H01L21/02 ,  H01L29/66 ,  H01L27/12 ,  G06F3/044 ,  G02F1/1368 ,  G02F1/1335

Abstract: The present disclosure discloses an array substrate and its manufacturing method and display panel, wherein, the method for fabricating the array substrate including the steps of: providing a substrate; sequentially forming a TFT functional layer, a touch signal transmission line, a first insulating layer, a first electrode, and a second insulating layer on the substrate; forming a first via and a second via on the second insulating layer by photolithography; forming a second electrode and a metal pattern on the second insulating layer; wherein the metal pattern connects the touch signal transmission line and the first electrode through the first via, and the second electrode connects the source and/or drain through the second via. By the above-described method, the present disclosure can reduce the manufacturing process of the array substrate, thereby reducing the manufacturing cost of the array substrate.