公开(公告)号：US20230317520A1

公开(公告)日：2023-10-05

申请号：US17712461

申请日：2022-04-04

Applicant: Winbond Electronics Corp.

Inventor： Chun-Hung LIN ,  Kao-Tsair TSAI ,  Chung-Hsien LIU ,  Tz-Hau GUO ,  Yen-Jui CHU

IPC: H01L21/768 ,  H01L21/8234

CPC classification number: H01L21/76897 ,  H01L21/76816 ,  H01L21/823475 ,  H01L21/76834

Abstract: A manufacturing method for a semiconductor structure is provided. First active areas, a second active area, and a third active area are formed. A first dielectric layer is formed on the active areas. A patterned region that includes a cavity region and a dielectric region is formed in the first dielectric layer, and the cavity region surrounds the dielectric region. A filling layer is formed in the cavity region. Multiple first contact holes and at least one second contact hole that penetrate the first dielectric layer are formed. Each first contact hole exposes a portion of the corresponding first active area, and the second contact hole replaces the dielectric region and exposes a portion of the second active area. Metal layers are filled in to the first contact holes and the second contact hole.