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公开(公告)号：US20190221672A1
公开(公告)日：2019-07-18
申请号：US15575107
申请日：2017-08-21
Inventor： Donghui Xiao
IPC: H01L29/786 , H01L29/51 , H01L29/66 , H01L21/02 , H01L21/28 , H01L21/265
Abstract: The present invention discloses a preparation method of a low temperature polysilicon thin film transistor including: successively forming a polysilicon active layer and a gate insulating layer covering the active layer on a base substrate; implanting nitrogen ions on a surface of the polysilicon active layer facing the gate insulating layer by an ion implantation process to form an ion implantation layer; and recrystallizing the ion implantation layer by a high temperature annealing process to form a silicon nitride spacing layer between the polysilicon active layer and the gate insulating layer. The present invention also provides a low temperature polysilicon thin film transistor including a polysilicon active layer, a gate insulating layer, a gate electrode, a source electrode and a drain electrode successively provided on a base substrate, wherein a connection interface between the polysilicon active layer and the gate insulating layer is formed with a silicon nitride spacing layer, and the silicon nitride spacing layer and the polysilicon active layer are in a integrally interconnected structure.
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公开(公告)号：US10516058B2
公开(公告)日：2019-12-24
申请号：US15575107
申请日：2017-08-21
Inventor： Donghui Xiao
IPC: H01L29/78 , H01L21/02 , H01L29/786 , H01L29/51 , H01L29/66 , H01L21/28 , H01L21/265
Abstract: The present invention discloses a preparation method of a low temperature polysilicon thin film transistor including: successively forming a polysilicon active layer and a gate insulating layer covering the active layer on a base substrate; implanting nitrogen ions on a surface of the polysilicon active layer facing the gate insulating layer by an ion implantation process to form an ion implantation layer; and recrystallizing the ion implantation layer by a high temperature annealing process to form a silicon nitride spacing layer between the polysilicon active layer and the gate insulating layer. The present invention also provides a low temperature polysilicon thin film transistor including a polysilicon active layer, a gate insulating layer, a gate electrode, a source electrode and a drain electrode successively provided on a base substrate, wherein a connection interface between the polysilicon active layer and the gate insulating layer is formed with a silicon nitride spacing layer, and the silicon nitride spacing layer and the polysilicon active layer are in a integrally interconnected structure.
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公开(公告)号：US20210336067A1
公开(公告)日：2021-10-28
申请号：US16467697
申请日：2019-01-11
Inventor： Donghui Xiao
IPC: H01L29/786 , H01L29/66 , H01L21/265
Abstract: A semiconductor component includes a substrate; a polysilicon layer formed on the substrate, and the polysilicon layer includes a source, a channel, and a drain, and the source and the drain are formed at two sides of the polysilicon layer, and the channel is formed between the source and the drain; a gate insulating layer formed on the polysilicon layer; a gate formed on the gate insulating layer and formed directly above the channel; an interlayer dielectric layer formed above the gate and covering the gate and implanted with hydrogen atoms by ion implantation and rapidly annealed at high temperature to form a hydrogenated interlayer dielectric layer; a metal conducting wire passing through an upper surface of the hydrogenated interlayer dielectric layer and contacting with the source or the drain; and a passivation layer covering the hydrogenated interlayer dielectric layer. A method of fabricating the semiconductor component is also provided.
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