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公开(公告)号:US11723295B2
公开(公告)日:2023-08-08
申请号:US17551214
申请日:2021-12-15
Applicant: United Microelectronics Corp.
Inventor: Hai Tao Liu , Li Li Ding , Yao-Hung Liu , Guoan Du , Qi Lu Li , Chunlei Wan , Yi Yu Lin , Yuchao Chen , Huakai Li , Hung-Yueh Chen
CPC classification number: H10N70/8833 , H10B63/80 , H10N70/028 , H10N70/24 , H10N70/826 , H10N70/8265 , H10N70/841
Abstract: A method for fabricating memory device includes: providing a substrate having a bottom electrode layer therein, forming a buffer layer and a mask layer on the buffer layer over the substrate, in contact with the bottom electrode layer, performing an advanced oxidation process on a sidewall of the buffer layer to form a resistive layer, which surrounds the whole sidewall of the buffer layer and extends upward vertically from the substrate, and forming, over the substrate, a noble metal layer and a top electrode layer on the noble metal layer, fully covering the resistive layer and the mask layer.
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公开(公告)号:US20220109104A1
公开(公告)日:2022-04-07
申请号:US17551214
申请日:2021-12-15
Applicant: United Microelectronics Corp.
Inventor: Hai Tao Liu , Li Li Ding , Yao-Hung Liu , Guoan Du , Qi Lu Li , Chunlei Wan , Yi Yu Lin , Yuchao Chen , Huakai Li , Hung-Yueh Chen
Abstract: A method for fabricating memory device includes: providing a substrate having a bottom electrode layer therein, forming a buffer layer and a mask layer on the buffer layer over the substrate, in contact with the bottom electrode layer, performing an advanced oxidation process on a sidewall of the buffer layer to form a resistive layer, which surrounds the whole sidewall of the buffer layer and extends upward vertically from the substrate, and forming, over the substrate, a noble metal layer and a top electrode layer on the noble metal layer, fully covering the resistive layer and the mask layer.
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公开(公告)号:US11239419B2
公开(公告)日:2022-02-01
申请号:US16505190
申请日:2019-07-08
Applicant: United Microelectronics Corp.
Inventor: Hai Tao Liu , Li Li Ding , Yao-Hung Liu , Guoan Du , Qi Lu Li , Chunlei Wan , Yi Yu Lin , Yuchao Chen , Huakai Li , Hung-Yueh Chen
Abstract: The present invention relates to a structure of a memory device. The structure of a memory device includes a substrate, including a bottom electrode layer formed therein. A buffer layer is disposed on the substrate, in contact with the bottom electrode layer. A resistive layer surrounds a whole sidewall of the buffer layer, and extends upward vertically from the substrate. A mask layer is disposed on the buffer layer and the resistive layer. A noble metal layer is over the substrate, and fully covers the resistive layer and the mask layer. A top electrode layer is disposed on the noble metal layer.
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