公开(公告)号：US07449769B2

公开(公告)日：2008-11-11

申请号：US11442427

申请日：2006-05-30

申请人： Tsunehiro Hato

发明人： Tsunehiro Hato

IPC分类号： H01L39/00

CPC分类号： H01L39/225 ,  H01L27/18

摘要： A superconducting system that includes an interface circuit capable of making the best use of a high-speed superconducting circuit and a high-speed semiconductor circuit. A multi-chip module in which an Nb superconducting circuit having Josephson junctions formed by the use of Nb and an oxide high-temperature superconducting latch interface circuit having Josephson junctions formed by the use of an oxide high-temperature superconductor are connected is located in a low temperature environment kept at 4.2 K. The oxide high-temperature superconducting latch interface circuit is connected to a high-speed semiconductor amplifier and a signal outputted from the Nb superconducting circuit is transmitted to the high-speed semiconductor amplifier. As a result, the limit of the operation speed of the oxide high-temperature superconducting latch interface circuit is raised and the superconducting system including the interface circuit capable of making the best use of both the high-speed Nb superconducting circuit and the high-speed semiconductor amplifier is realized.

摘要翻译： 一种超导系统，其包括能够充分利用高速超导电路和高速半导体电路的接口电路。 将通过使用Nb形成具有约瑟夫逊结的Nb超导电路和通过使用氧化物高温超导体形成的具有约瑟夫逊结的氧化物高温超导闩锁接口电路的多芯片模块连接在一起 低温环境保持在4.2K。氧化物高温超导闩锁接口电路连接到高速半导体放大器，从Nb超导电路输出的信号传输到高速半导体放大器。 结果，提高了氧化物高温超导闩锁接口电路的操作速度的极限，并且包括能够充分利用高速Nb超导电路和高速超导电路的接口电路的超导系统 半导体放大器实现。

公开(公告)号：US07300909B2

公开(公告)日：2007-11-27

申请号：US10809919

申请日：2004-03-26

申请人： Tsunehiro Hato ,  Masahiro Horibe ,  Keiichi Tanabe

发明人： Tsunehiro Hato ,  Masahiro Horibe ,  Keiichi Tanabe

IPC分类号： H01B1/00

CPC分类号： H01L39/225 ,  H01L27/18

摘要： A first Josephson junction in a Single Flux Quantum circuit (SFQ circuit) and a second Josephson junction in an interface circuit (latch driver circuit) are formed with junction materials different from each other, and the junction materials are selected so that the hysteresis of the first Josephson junction in a current-voltage characteristic is smaller than the hysteresis of the second Josephson junction in a current-voltage characteristic.

摘要翻译： 单通道量子电路（SFQ电路）中的第一个约瑟夫逊结和接口电路（锁存驱动器电路）中的第二个约瑟夫逊结形成为具有彼此不同的连接材料，并且连接材料被选择为使得 电流 - 电压特性中的第一约瑟夫逊结小于电流 - 电压特性中第二约瑟夫逊结的滞后。

公开(公告)号：US07075171B2

公开(公告)日：2006-07-11

申请号：US10793936

申请日：2004-03-08

申请人： Tsunehiro Hato

发明人： Tsunehiro Hato

IPC分类号： H01L39/00

CPC分类号： H01L39/225 ,  H01L27/18

摘要： A superconducting system that includes an interface circuit capable of making the best use of a high-speed superconducting circuit and a high-speed semiconductor circuit. A multi-chip module in which an Nb superconducting circuit having josephson junctions formed by the use of Nb and an oxide high-temperature superconducting latch interface circuit having josephson junctions formed by the use of an oxide high-temperature superconductor are connected is located in a low temperature environment kept at 4.2 K. The oxide high-temperature superconducting latch interface circuit is connected to a high-speed semiconductor amplifier and a signal outputted from the Nb superconducting circuit is transmitted to the high-speed semiconductor amplifier. As a result, the limit of the operation speed of the oxide high-temperature superconducting latch interface circuit is raised and the superconducting system including the interface circuit capable of making the best use of both the high-speed Nb superconducting circuit and the high-speed semiconductor amplifier is realized.

摘要翻译： 一种超导系统，其包括能够充分利用高速超导电路和高速半导体电路的接口电路。 连接具有通过使用Nb形成的约瑟夫森结的Nb超导电路和具有通过使用氧化物高温超导体形成的约瑟夫逊结的氧化物高温超导闩锁接口电路的多芯片模块，位于 低温环境保持在4.2K。氧化物高温超导闩锁接口电路连接到高速半导体放大器，从Nb超导电路输出的信号传输到高速半导体放大器。 结果，提高了氧化物高温超导闩锁接口电路的操作速度的极限，并且包括能够充分利用高速Nb超导电路和高速超导电路的接口电路的超导系统 半导体放大器实现。

公开(公告)号：US20050029512A1

公开(公告)日：2005-02-10

申请号：US10809919

申请日：2004-03-26

申请人： Tsunehiro Hato ,  Masahiro Horibe ,  Keiichi Tanabe

发明人： Tsunehiro Hato ,  Masahiro Horibe ,  Keiichi Tanabe

IPC分类号： H01L27/18 ,  H01L39/22 ,  H01L29/06

CPC分类号： H01L39/225 ,  H01L27/18

摘要： A first Josephson junction in a Single Flux Quantum circuit (SFQ circuit) and a second Josephson junction in an interface circuit (latch driver circuit) are formed with junction materials different from each other, and the junction materials are selected so that the hysteresis of the first Josephson junction in a current-voltage characteristic is smaller than the hysteresis of the second Josephson junction in a current-voltage characteristic.

摘要翻译： 单通道量子电路（SFQ电路）中的第一个约瑟夫逊结和接口电路（锁存驱动器电路）中的第二个约瑟夫逊结形成为具有彼此不同的连接材料，并且连接材料被选择为使得 电流 - 电压特性中的第一约瑟夫逊结小于电流 - 电压特性中第二约瑟夫逊结的滞后。

公开(公告)号：US5760463A

公开(公告)日：1998-06-02

申请号：US601646

申请日：1996-02-14

申请人： Tsunehiro Hato

发明人： Tsunehiro Hato

IPC分类号： H01L39/06 ,  H01L23/498 ,  H01L23/532 ,  H01L23/538 ,  H01L39/22 ,  H01L39/00 ,  H01L29/06 ,  H01P1/00 ,  H04B1/00

CPC分类号： H01L23/498 ,  H01L23/49888 ,  H01L23/53285 ,  H01L23/538 ,  H01L2924/0002 ,  Y10S505/703 ,  Y10S505/704 ,  Y10S505/813 ,  Y10S505/856 ,  Y10S505/866

摘要： A superconductor device which includes a first wiring part and a second wiring part which together form a superconductive wiring. The first wiring part is arranged onto a substrate and is made of a superconductor material. The second wiring part is made of a non-oxide semiconductor material. The second wiring part is adjacent to the first wiring part and jointly forms a superconductive wiring with the first wiring part by becoming at least partly superconductive due to proximity effect with the first wiring part. The second wiring part has a smaller penetration length of magnetic field than that for the first wiring part. This structure enhances the propagation velocity of a signal within the superconductive wiring.

摘要翻译： 一种超导体装置，其包括一起形成超导布线的第一布线部和第二布线部。 第一布线部分布置在基板上并且由超导体材料制成。 第二配线部由非氧化物半导体材料制成。 第二布线部分与第一布线部分相邻，并且由于与第一布线部分的接近效应，通过变得至少部分地超导而与第一布线部分共同形成超导布线。 第二配线部分具有比第一配线部分更小的磁场穿透长度。 这种结构增强了超导布线内信号的传播速度。

公开(公告)号：US20070069339A1

公开(公告)日：2007-03-29

申请号：US11442427

申请日：2006-05-30

申请人： Tsunehiro Hato

发明人： Tsunehiro Hato

IPC分类号： H01L39/00

CPC分类号： H01L39/225 ,  H01L27/18

摘要： A superconducting system that includes an interface circuit capable of making the best use of a high-speed superconducting circuit and a high-speed semiconductor circuit. A multi-chip module in which an Nb superconducting circuit having Josephson junctions formed by the use of Nb and an oxide high-temperature superconducting latch interface circuit having Josephson junctions formed by the use of an oxide high-temperature superconductor are connected is located in a low temperature environment kept at 4.2 K. The oxide high-temperature superconducting latch interface circuit is connected to a high-speed semiconductor amplifier and a signal outputted from the Nb superconducting circuit is transmitted to the high-speed semiconductor amplifier. As a result, the limit of the operation speed of the oxide high-temperature superconducting latch interface circuit is raised and the superconducting system including the interface circuit capable of making the best use of both the high-speed Nb superconducting circuit and the high-speed semiconductor amplifier is realized.

摘要翻译： 一种超导系统，其包括能够充分利用高速超导电路和高速半导体电路的接口电路。 将通过使用Nb形成具有约瑟夫逊结的Nb超导电路和通过使用氧化物高温超导体形成的具有约瑟夫逊结的氧化物高温超导闩锁接口电路的多芯片模块连接在一起 低温环境保持在4.2K。氧化物高温超导闩锁接口电路连接到高速半导体放大器，从Nb超导电路输出的信号传输到高速半导体放大器。 结果，提高了氧化物高温超导闩锁接口电路的操作速度的极限，并且包括能够充分利用高速Nb超导电路和高速超导电路的接口电路的超导系统 半导体放大器实现。

公开(公告)号：US20050078022A1

公开(公告)日：2005-04-14

申请号：US10927147

申请日：2004-08-27

申请人： Satoru Hirano ,  Hideo Suzuki ,  Keiichi Tanabe ,  Akira Yoshida ,  Tsunehiro Hato ,  Michitaka Maruyama

发明人： Satoru Hirano ,  Hideo Suzuki ,  Keiichi Tanabe ,  Akira Yoshida ,  Tsunehiro Hato ,  Michitaka Maruyama

IPC分类号： H03K3/38 ,  H03M3/02 ,  H03M3/00 ,  H03M1/00

CPC分类号： H03K3/38 ,  H03M3/43 ,  H03M3/438

摘要： A circuit includes a latch circuit including a Josephson junction and configured to perform a latch operation based on a hysteresis characteristic in response to a single flux quantum, a load circuit including load inductance and load resistance and coupled to an output of the latch circuit, and a reset circuit provided between the output of the latch circuit and the load circuit and configured to reset the latch circuit a predetermined time after the latch operation by the latch circuit, wherein the Josephson junction is driven by a direct current.

摘要翻译： 电路包括一个锁存电路，该锁存电路包括约瑟夫逊结，并被配置为响应于单个通量量子来执行基于滞后特性的锁存操作，负载电路包括负载电感和负载电阻并耦合到锁存电路的输出，以及 复位电路，设置在所述锁存电路的输出端与所述负载电路之间，并配置为在所述锁存电路进行锁存操作之后的预定时间内复位所述锁存电路，其中所述约瑟夫逊结由直流电驱动。

公开(公告)号：US5950103A

公开(公告)日：1999-09-07

申请号：US726174

申请日：1996-10-04

申请人： Tsunehiro Hato ,  Chikako Yoshida

发明人： Tsunehiro Hato ,  Chikako Yoshida

IPC分类号： H01L39/00 ,  H01L29/06 ,  H01L39/02 ,  H01L39/22 ,  H01L21/4763

CPC分类号： H01L39/22

摘要： An impurity supply film made of dielectric oxide material is deposited on the surface of an underlying substrate having a surface layer made of different dielectric oxide material. An impurity absorption film made of the same dielectric oxide material as the surface layer of the underlying substrate is deposited on the impurity supply film. The underlying substrate is heated to replace a fraction of at least one type of constituent atoms other than oxygen atoms in the impurity supply film by a fraction of at least one type of constituent atoms other than oxygen atoms in the surface layer of the underlying substrate and in the impurity absorption film, for the whole thickness of the impurity supply film. A method is provided by which impurities are selectively doped in a dielectric oxide material without leaving an electrical barrier on the surface of the material.

摘要翻译： 由电介质氧化物材料制成的杂质供应膜沉积在具有由不同电介质氧化物材料制成的表面层的底层衬底的表面上。 由与基底的表面层相同的电介质氧化物材料制成的杂质吸收膜沉积在杂质供应膜上。 底层基底被加热以通过在下面的基底的表面层中除了氧原子之外的至少一种类型的组成原子的一部分，在杂质供应膜中的除了氧原子之外的至少一种类型的构成原子的一部分， 在杂质吸收膜中，对于杂质供应膜的整个厚度。 提供了一种方法，通过其将杂质选择性地掺杂在电介质氧化物材料中，而不在材料的表面上留下电屏障。

公开(公告)号：US5318952A

公开(公告)日：1994-06-07

申请号：US112806

申请日：1993-08-27

申请人： Tsunehiro Hato

发明人： Tsunehiro Hato

IPC分类号： H01L39/22 ,  B05D5/12 ,  H01B12/00

CPC分类号： H01L39/228 ,  Y10S505/701 ,  Y10S505/702

摘要： A superconducting transistor is provided with a base layer made of a normal conductor metal, an emitter layer made of a superconductor for injecting hot electrons to the base layer, a collector layer made of a superconductor for trapping electrons from the base layer, a first tunnel barrier layer made of an insulator and provided between the base layer and the emitter layer, and a second tunnel barrier layer made of an insulator and provided between the base layer and the collector layer.

摘要翻译： 超导晶体管设置有由普通导体金属制成的基极层，由用于向基底层注入热电子的超导体制成的发射极层，由用于从基极层俘获电子的超导体制成的集电极层，第一隧道 由绝缘体制成并设置在基底层和发射极层之间的阻挡层以及设置在基底层和集电体层之间的由绝缘体制成的第二隧道势垒层。

公开(公告)号：US20070049097A1

公开(公告)日：2007-03-01

申请号：US11524205

申请日：2006-09-21

申请人： Satoru Hirano ,  Hideo Suzuki ,  Keiichi Tanabe ,  Akira Yoshida ,  Tsunehiro Hato ,  Michitaka Maruyama

发明人： Satoru Hirano ,  Hideo Suzuki ,  Keiichi Tanabe ,  Akira Yoshida ,  Tsunehiro Hato ,  Michitaka Maruyama

IPC分类号： H01R4/50

CPC分类号： H03K3/38 ,  H03M3/43 ,  H03M3/438

摘要： A circuit includes a latch circuit including a Josephson junction and configured to perform a latch operation based on a hysteresis characteristic in response to a single flux quantum, a load circuit including load inductance and load resistance and coupled to an output of the latch circuit, and a reset circuit provided between the output of the latch circuit and the load circuit and configured to reset the latch circuit a predetermined time after the latch operation by the latch circuit, wherein the Josephson junction is driven by a direct current.