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公开(公告)号:US20150008566A1
公开(公告)日:2015-01-08
申请号:US14320803
申请日:2014-07-01
发明人: Mark A. Gerber , Mutsumi Masumoto , Kenji Masumoto , Anindya Poddar , Kengo Aoya , Masamitsu Matsuura , Takeshi Onogami
IPC分类号: H01L23/00 , H01L23/495
CPC分类号: H01L24/97 , H01L21/561 , H01L21/568 , H01L21/6835 , H01L23/3128 , H01L23/5389 , H01L23/544 , H01L24/19 , H01L24/96 , H01L2221/68327 , H01L2221/6834 , H01L2221/68372 , H01L2221/68381 , H01L2223/54426 , H01L2224/04105 , H01L2224/12105 , H01L2224/32225 , H01L2224/73267 , H01L2224/92244 , H01L2224/97 , H01L2924/12042 , H01L2924/18162 , H01L2924/3511 , H01L2224/83 , H01L2224/82 , H01L2924/00
摘要: A method for fabricating packaged semiconductor devices in panel format; placing a panel-sized metallic grid with openings on an adhesive tape (292); attaching semiconductor chips—coated with a polymer layer having windows for chip terminals —face-down onto the tape (293); laminating low CTE insulating material to fill gaps between chips and grid (294); turning over assembly to place carrier under backside of chips and lamination and to remove tape (295); plasma-cleaning assembly front side, sputtering uniform metal layer across assembly (296); optionally plating metal layer (297); and patterning sputtered layer to form rerouting traces and extended contact pads for assembly (298).
摘要翻译: 一种以面板格式制造封装半导体器件的方法; 将具有开口的面板尺寸的金属网格放置在胶带(292)上; 将具有用于芯片端子的具有窗口的聚合物层的半导体芯片附接到带(293)上; 层压低CTE绝缘材料以填充芯片和网格之间的间隙(294); 翻转组件以将载体放置在芯片的背面和层压之下并去除带(295); 等离子体清洁组件正面,横跨组装的溅射均匀金属层(296); 可选地镀金属层(297); 并且图案化溅射层以形成重新布线迹线和用于组装的扩展接触垫(298)。