公开(公告)号：US20240297621A1

公开(公告)日：2024-09-05

申请号：US18592045

申请日：2024-02-29

Applicant: Texas Instruments Incorporated

Inventor： Jawaharlal Tangudu ,  Goutham Ramesh ,  Sarma Sundareswara Gunturi ,  Harsh Garg ,  Jaiganesh Balakrishnan ,  Mathews John ,  Sashidharan Venkatraman ,  Sanjay Pennam

IPC: H03F1/32 ,  H03F3/21

CPC classification number: H03F1/3241 ,  H03F3/21 ,  H03F2201/3233

Abstract: An example method includes switching a first multiplexer circuit associated with first delay circuitry from (a) a first sub-lookup table (LUT) of a first LUT of digital pre-distortion (DPD) corrector circuitry to (b) a first corresponding sub-LUT of a second LUT of the DPD corrector circuitry, the first sub-LUT associated with the first delay circuitry, the second LUT storing updated values to compensate for non-linearity of power amplifier circuitry of a transmitter including the DPD corrector circuitry. The method includes, based on a value of a counter being equal to a difference between (1) a first delay of the first delay circuitry and (2) a second delay of second delay circuitry, switching a second multiplexer circuit associated with the second delay circuitry from (a) a second sub-LUT of the first LUT to (b) a second corresponding sub-LUT of the second LUT, the second sub-LUT associated with the second delay circuitry.