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50 条记录 (耗时 0.018 秒)

    Electrical connector for circuit board
    6.
    发明授权
    Electrical connector for circuit board 有权
    电路板电连接器

    公开(公告)号：US07462040B1

    公开(公告)日：2008-12-09

    申请号：US11984271

    申请日：2007-11-15

    申请人： Toshiyuki Takada

    发明人： Toshiyuki Takada

    IPC分类号： H01R12/00

    CPC分类号： H01R13/193 ,  H01R12/707 ,  H01R12/712 ,  H01R13/629

    摘要： An electrical connector for a circuit board is provided with a relay member connection body and a relay member receiving body. The relay member connection body is provided with terminals and a terminal holding body to hold the terminals. The relay member receiving body is fitted into the relay member connection body and receives a relay member that is to be connected with the terminals. The relay member receiving body is provided with receiving grooves extending in the assemble direction to receive the relay member. One end side of the terminal is held, and a contact portion elastically bendable inward of the receiving groove is provided in the other end side of the terminal. A distal portion of the terminal on the other end side abuts against the relay member receiving body, so that the terminals receive pre-compression in an elastically bending direction of the contact portion.

    摘要翻译： 用于电路板的电连接器设置有中继构件连接体和中继构件接收体。 继电器构件连接体设置有用于保持端子的端子和端子保持体。 继电器件接收体装配到继电器件连接体中并接收与端子连接的继电器部件。 继电器件接收体设置有沿组装方向延伸的接收槽，用于接收继电器件。 端子的一端侧被保持，并且在端子的另一端侧设置有在容纳槽内向弹性弯曲的接触部。 端子的另一端侧的远端与中继构件接收体抵接，使得端子在接触部的弹性弯曲方向上受到预压缩。

    Crankchamber precompression type two-cycle internal combustion engines
    7.
    发明授权
    Crankchamber precompression type two-cycle internal combustion engines 失效
    Crankchamber预压式双循环内燃机

    公开(公告)号：US4138971A

    公开(公告)日：1979-02-13

    申请号：US736141

    申请日：1976-10-27

    申请人： Tetsuzo Fujikawa ,  Toshiyuki Takada

    发明人： Tetsuzo Fujikawa ,  Toshiyuki Takada

    IPC分类号： F02B75/18 ,  F02B29/06 ,  F02B33/06 ,  F02B33/14 ,  F02B75/02 ,  F02B75/20

    CPC分类号： F02B29/06 ,  F02B33/06 ,  F02B75/20 ,  F02B2075/025 ,  Y02T10/146

    摘要： Twin cylinder two cycle engine including a pair of stepped cylinders and a pair of stepped pistons slidable in said cylinders defining annular spaces of variable volume in said cylinders. The pistons are interconnected each other with 180.degree. phase difference. Air-fuel mixture introduced into the annular space in one cylinder is forced into the crankchamber of the other cylinder during the upward stroke of the associated piston, so that an additional charge is provided.

    摘要翻译： 双缸二冲程发动机包括一对阶梯式气缸和一对可在所述气缸中滑动的阶梯式活塞，在所述气缸中限定可变容积的环形空间。 活塞以180°的相位相互连接。 引入一个气缸的环形空间的空气 - 燃料混合物在相关活塞的向上冲程期间被迫进入另一个气缸的曲柄室，从而提供额外的电荷。

    Low density parity check codes decoder and method thereof
    8.
    发明授权
    Low density parity check codes decoder and method thereof 有权
    低密度奇偶校验码解码器及其方法

    公开(公告)号：US08156399B2

    公开(公告)日：2012-04-10

    申请号：US13041957

    申请日：2011-03-07

    申请人： Atsuhiko Sugitani ,  Toshiyuki Takada

    发明人： Atsuhiko Sugitani ,  Toshiyuki Takada

    IPC分类号： H03M13/00

    CPC分类号： H03M13/116 ,  H03M13/1105 ,  H03M13/1111 ,  H03M13/1145 ,  H03M13/6502 ,  H03M13/6516

    摘要： A low density parity check codes decoder decodes an LDPC code with an arbitrary coding rate by the same configuration. The low density parity check codes decoder enables decoding of an LDPC code constituted by a base matrix of Mbmax rows and Nbmax columns and a permutation matrix as an element of the base matrix. It stores therein Mbmax×Nbmax validity/invalidity flags, shift amounts of valid permutation matrices, a permutation matrix size in a processing target code, and the number of rows of a base matrix in the processing target code, determined depending on a check matrix for the processing target LDPC code, and generates column addresses and a row address to be given to column processing calculation sections and a row processing calculation section that perform calculation in accordance with a BP algorithm by utilizing the stored information, so that it can process an LDPC code for a smaller base matrix than the aforementioned base matrix as well.

    摘要翻译： 低密度奇偶校验码解码器以相同的配置解码具有任意编码速率的LDPC码。 低密度奇偶校验码解码器能够对由Mbmax行的基本矩阵和Nbmax列构成的LDPC码和作为基本矩阵的元素的置换矩阵进行解码。 其中存储有Mbmax×Nbmax有效/无效标志，有效置换矩阵的移位量，处理目标代码中的置换矩阵大小以及处理目标代码中的基本矩阵的行数，其取决于用于 处理对象LDPC码，并且生成列处理计算部分的列地址和行地址以及根据BP算法通过利用所存储的信息进行计算的行处理计算部分，从而可以处理LDPC 编码比上述基本矩阵更小的基本矩阵。

    Low density parity check codes decoder and method thereof
    10.
    发明申请
    Low density parity check codes decoder and method thereof 有权
    低密度奇偶校验码解码器及其方法

    公开(公告)号：US20080046801A1

    公开(公告)日：2008-02-21

    申请号：US11890511

    申请日：2007-08-07

    申请人： Atsuhiko Sugitani ,  Toshiyuki Takada

    发明人： Atsuhiko Sugitani ,  Toshiyuki Takada

    IPC分类号： H03M13/00

    CPC分类号： H03M13/116 ,  H03M13/1105 ,  H03M13/1111 ,  H03M13/1145 ,  H03M13/6502 ,  H03M13/6516

    摘要： It is an object of the present invention to provide a low density parity check codes decoder that can decode an LDPC code with an arbitrary coding rate by the same configuration. The low density parity check codes decoder according to the present invention is configured to enable decoding of an LDPC code constituted by a base matrix of Mbmax rows and Nbmax columns and a permutation matrix as an element of the base matrix. It stores therein Mbmax×Nbmax validity/invalidity flags, shift amounts of valid permutation matrices, a permutation matrix size in a processing target code, and the number of rows of a base matrix in the processing target code, determined depending on a check matrix for the processing target LDPC code, and generates column addresses and a row address to be given to column processing calculation sections and a row processing calculation section that perform calculation in accordance with a BP algorithm by utilizing the stored information, so that it can process an LDPC code for a smaller base matrix than the aforementioned base matrix as well.

    摘要翻译： 本发明的目的是提供一种低密度奇偶校验码解码器，其可以通过相同的配置对具有任意编码率的LDPC码进行解码。 根据本发明的低密度奇偶校验码解码器被配置为能够对由Mbmax行的基本矩阵和Nbmax列构成的LDPC码和作为基本矩阵的元素的置换矩阵进行解码。 其中存储有MbmaxxNbmax有效/无效标志，有效置换矩阵的移位量，处理目标代码中的置换矩阵大小以及处理目标代码中的基本矩阵的行数，这取决于用于处理的校验矩阵 目标LDPC码，并且生成列处理计算部分的列地址和行地址以及根据BP算法通过利用所存储的信息执行计算的行处理计算部分，从而可以处理LDPC码 比上述基本矩阵更小的基本矩阵。