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    LOGIC TRANSFORMATION AND GATE PLACEMENT TO AVOID ROUTING CONGESTION
    7.
    发明申请
    LOGIC TRANSFORMATION AND GATE PLACEMENT TO AVOID ROUTING CONGESTION 有权
    逻辑转换和栅格放置避免路由约束

    公开(公告)号：US20080115094A1

    公开(公告)日：2008-05-15

    申请号：US12014344

    申请日：2008-01-15

    申请人： Chaitra Bhat ,  M. Chandrika ,  Atsushi Sugai ,  Toshihiko Yokota

    发明人： Chaitra Bhat ,  M. Chandrika ,  Atsushi Sugai ,  Toshihiko Yokota

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5045

    摘要： A novel logic design method for avoiding wiring congestion. According to the novel logic design method, an original gate having multiple inputs coming from different directions and having multiple outputs coming to different directions can be transformed to a logic block that has an input stage and an output stage. The gates of the input stage receive signals from the multiple inputs of the original gate. The gates of the output stage send signals to the multiple outputs of the original gate. Each gate of the input stage is placed in a vicinity of its inputs. Each gate of the output stage is placed in a vicinity of its outputs. The gates of the input and output stages are functionally equivalent to the original gate.

    摘要翻译： 一种避免布线堵塞的新颖逻辑设计方法。 根据新颖的逻辑设计方法，可以将具有来自不同方向的多个输入并且具有进入不同方向的多个输出的原始门转换为具有输入级和输出级的逻辑块。 输入级的门从原始门的多个输入接收信号。 输出级的门将信号发送到原始门的多个输出。 输入级的每个门都放置在其输入端附近。 输出级的每个门都放置在其输出端附近。 输入和输出级的门在功能上等同于原始门。

    Image reading device and image forming apparatus including same
    8.
    发明授权
    Image reading device and image forming apparatus including same 有权

    公开(公告)号：US09674384B2

    公开(公告)日：2017-06-06

    申请号：US15284590

    申请日：2016-10-04

    申请人： Atsushi Sugai

    发明人： Atsushi Sugai

    IPC分类号： G03G15/00 ,  H04N1/00 ,  H04N1/10

    CPC分类号： H04N1/00795 ,  H04N1/00559 ,  H04N1/1065 ,  H04N2201/0081 ,  H04N2201/0094

    摘要： An image reading device includes a frame, an image reading unit, a guide, a biasing member, and an adjuster. The image reading unit reads, while moving in a predetermined direction, image information of a document placed on an exposure glass. The guide extends in the predetermined direction and is supported by the frame, to engage and guide the image reading unit to move the image reading unit in the predetermined direction. The biasing member biases the guide in a direction against a direction in which the guide bends due to weight of the guide and weight of the image reading unit. The adjuster adjusts a biasing force of the biasing member against the guide.

    Logic transformation and gate placement to avoid routing congestion
    9.
    发明申请
    Logic transformation and gate placement to avoid routing congestion 有权
    逻辑转换和门放置，以避免路由拥塞

    公开(公告)号：US20060282809A1

    公开(公告)日：2006-12-14

    申请号：US11153707

    申请日：2005-06-14

    申请人： Chaitra Bhat ,  M. Chandrika ,  Atsushi Sugai ,  Toshihiko Yokota

    发明人： Chaitra Bhat ,  M. Chandrika ,  Atsushi Sugai ,  Toshihiko Yokota

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5045

    摘要： A novel logic design method for avoiding wiring congestion. According to the novel logic design method, an original gate having multiple inputs coming from different directions and having multiple outputs coming to different directions can be transformed to a logic block that has an input stage and an output stage. The gates of the input stage receive signals from the multiple inputs of the original gate. The gates of the output stage send signals to the multiple outputs of the original gate. Each gate of the input stage is placed in a vicinity of its inputs. Each gate of the output stage is placed in a vicinity of its outputs. The gates of the input and output stages are functionally equivalent to the original gate.

    摘要翻译： 一种避免布线堵塞的新颖逻辑设计方法。 根据新颖的逻辑设计方法，可以将具有来自不同方向的多个输入并且具有进入不同方向的多个输出的原始门转换为具有输入级和输出级的逻辑块。 输入级的门从原始门的多个输入接收信号。 输出级的门将信号发送到原始门的多个输出。 输入级的每个门都放置在其输入端附近。 输出级的每个门都放置在其输出端附近。 输入和输出级的门在功能上等同于原始门。