公开(公告)号：US20230129760A1

公开(公告)日：2023-04-27

申请号：US18087819

申请日：2022-12-23

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Kuo-Ming WU ,  Ming-Che LEE ,  Hau-Yi HSIAO ,  Cheng-Hsien CHOU ,  Sheng-Chau CHEN ,  Cheng-Yuan TSAI

IPC分类号： H01L25/00 ,  H01L23/31 ,  H01L21/268 ,  H01L23/00 ,  H01L23/532

摘要： A bonded assembly of a first wafer including a first semiconductor substrate and a second wafer including a second semiconductor substrate may be formed. The second semiconductor substrate may be thinned to a first thickness, and an inter-wafer moat trench may be formed at a periphery of the bonded assembly. A protective material layer may be formed in the inter-wafer moat trench and over the backside surface of the second semiconductor substrate. A peripheral portion of the second semiconductor substrate located outside the inter-wafer moat trench may be removed, and a cylindrical portion of the protective material layer laterally surrounds a remaining portion of the bonded assembly. The second semiconductor substrate may be thinned to a second thickness by performing at least one thinning process while the cylindrical portion of the protective material layer protects the remaining portion of the bonded assembly.

公开(公告)号：US20220270918A1

公开(公告)日：2022-08-25

申请号：US17181464

申请日：2021-02-22

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED

发明人： Ming-Che LEE ,  Sheng-Chau CHEN ,  Cheng-Hsien CHOU ,  Cheng-Yuan TSAI

IPC分类号： H01L21/762 ,  H01L21/02

摘要： A method of making a semiconductor arrangement includes forming a first layer of molecular ions in a first wafer interface region of a first wafer, forming a second layer of molecular ions in a second wafer interface region of a second wafer, forming a first molecular bond connecting the first wafer interface region to the second wafer interface region by applying pressure to at least one of the first wafer or the second wafer in a direction toward the first wafer interface region and the second wafer interface region, and annealing the first wafer and the second wafer to form a second molecular bond connecting the first wafer interface region to the second wafer interface region.

公开(公告)号：US20240363613A1

公开(公告)日：2024-10-31

申请号：US18770392

申请日：2024-07-11

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Kuo-Ming WU ,  Ming-Che LEE ,  Hau-Yi HSIAO ,  Cheng-Hsien CHOU ,  Sheng-Chau CHEN ,  Cheng-Yuan TSAI

IPC分类号： H01L25/00 ,  H01L21/268 ,  H01L21/304 ,  H01L21/306 ,  H01L21/3065 ,  H01L21/308 ,  H01L23/00 ,  H01L23/31 ,  H01L23/532

CPC分类号： H01L25/50 ,  H01L21/268 ,  H01L23/3171 ,  H01L23/3185 ,  H01L23/5329 ,  H01L24/94 ,  H01L21/304 ,  H01L21/30604 ,  H01L21/30625 ,  H01L21/3065 ,  H01L21/3083 ,  H01L24/05 ,  H01L24/08 ,  H01L2224/0557 ,  H01L2224/08145 ,  H01L2224/94

摘要： A bonded assembly of a first wafer including a first semiconductor substrate and a second wafer including a second semiconductor substrate may be formed. The second semiconductor substrate may be thinned to a first thickness, and an inter-wafer moat trench may be formed at a periphery of the bonded assembly. A protective material layer may be formed in the inter-wafer moat trench and over the backside surface of the second semiconductor substrate. A peripheral portion of the second semiconductor substrate located outside the inter-wafer moat trench may be removed, and a cylindrical portion of the protective material layer laterally surrounds a remaining portion of the bonded assembly. The second semiconductor substrate may be thinned to a second thickness by performing at least one thinning process while the cylindrical portion of the protective material layer protects the remaining portion of the bonded assembly.

公开(公告)号：US20220271023A1

公开(公告)日：2022-08-25

申请号：US17181380

申请日：2021-02-22

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Kuo-Ming WU ,  Ming-Che LEE ,  Hau-Yi HSIAO ,  Cheng-Hsien CHOU ,  Sheng-Chau CHEN ,  Cheng-Yuan TSAI

IPC分类号： H01L25/00 ,  H01L23/31 ,  H01L21/268 ,  H01L23/00 ,  H01L23/532

摘要： A bonded assembly of a first wafer including a first semiconductor substrate and a second wafer including a second semiconductor substrate may be formed. The second semiconductor substrate may be thinned to a first thickness, and an inter-wafer moat trench may be formed at a periphery of the bonded assembly. A protective material layer may be formed in the inter-wafer moat trench and over the backside surface of the second semiconductor substrate. A peripheral portion of the second semiconductor substrate located outside the inter-wafer moat trench may be removed, and a cylindrical portion of the protective material layer laterally surrounds a remaining portion of the bonded assembly. The second semiconductor substrate may be thinned to a second thickness by performing at least one thinning process while the cylindrical portion of the protective material layer protects the remaining portion of the bonded assembly.