公开(公告)号：US20220375877A1

公开(公告)日：2022-11-24

申请号：US17365699

申请日：2021-07-01

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chih-Hsuan Tai ,  Ming-Chung Wu ,  Kuo-Wen Chen ,  Hsiang-Tai Lu

IPC分类号： H01L23/58 ,  H01L23/498 ,  H01L23/522 ,  H01L23/528

摘要： Semiconductor structures and methods of testing the same are provided. A semiconductor structure according to the present disclosure includes a substrate, a semiconductor device over the substrate, wherein the semiconductor device includes an interconnect structure, and the interconnect structure includes a plurality of metallization layers disposed in a dielectric layer; and a delamination sensor. The delamination sensor includes a connecting structure and a plurality of contact vias in at least one of the plurality of metallization layers. The connecting structure bonds the semiconductor device to the substrate and does not functionally couple the semiconductor device to the substrate. The plurality of contact vias fall within a first region of a vertical projection area of the connecting structure but do not overlap a second region of the vertical projection area.

公开(公告)号：US12125810B2

公开(公告)日：2024-10-22

申请号：US18190361

申请日：2023-03-27

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chih-Hsuan Tai ,  Ming-Chung Wu ,  Kuo-Wen Chen ,  Hsiang-Tai Lu

IPC分类号： H01L23/58 ,  H01L23/498 ,  H01L23/522 ,  H01L23/528

CPC分类号： H01L23/585 ,  H01L23/49816 ,  H01L23/5226 ,  H01L23/528

摘要： Semiconductor structures and methods of testing the same are provided. A semiconductor structure according to the present disclosure includes a substrate, a semiconductor device over the substrate, wherein the semiconductor device includes an interconnect structure, and the interconnect structure includes a plurality of metallization layers disposed in a dielectric layer; and a delamination sensor. The delamination sensor includes a connecting structure and a plurality of contact vias in at least one of the plurality of metallization layers. The connecting structure bonds the semiconductor device to the substrate and does not functionally couple the semiconductor device to the substrate. The plurality of contact vias fall within a first region of a vertical projection area of the connecting structure but do not overlap a second region of the vertical projection area.

公开(公告)号：US20230238340A1

公开(公告)日：2023-07-27

申请号：US18190361

申请日：2023-03-27

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chih-Hsuan Tai ,  Ming-Chung Wu ,  Kuo-Wen Chen ,  Hsiang-Tai Lu

IPC分类号： H01L23/58 ,  H01L23/528 ,  H01L23/522 ,  H01L23/498

CPC分类号： H01L23/585 ,  H01L23/528 ,  H01L23/5226 ,  H01L23/49816

摘要： Semiconductor structures and methods of testing the same are provided. A semiconductor structure according to the present disclosure includes a substrate, a semiconductor device over the substrate, wherein the semiconductor device includes an interconnect structure, and the interconnect structure includes a plurality of metallization layers disposed in a dielectric layer; and a delamination sensor. The delamination sensor includes a connecting structure and a plurality of contact vias in at least one of the plurality of metallization layers. The connecting structure bonds the semiconductor device to the substrate and does not functionally couple the semiconductor device to the substrate. The plurality of contact vias fall within a first region of a vertical projection area of the connecting structure but do not overlap a second region of the vertical projection area.

公开(公告)号：US11616029B2

公开(公告)日：2023-03-28

申请号：US17365699

申请日：2021-07-01

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chih-Hsuan Tai ,  Ming-Chung Wu ,  Kuo-Wen Chen ,  Hsiang-Tai Lu

IPC分类号： H01L23/58 ,  H01L23/528 ,  H01L23/522 ,  H01L23/498

摘要： Semiconductor structures and methods of testing the same are provided. A semiconductor structure according to the present disclosure includes a substrate, a semiconductor device over the substrate, wherein the semiconductor device includes an interconnect structure, and the interconnect structure includes a plurality of metallization layers disposed in a dielectric layer; and a delamination sensor. The delamination sensor includes a connecting structure and a plurality of contact vias in at least one of the plurality of metallization layers. The connecting structure bonds the semiconductor device to the substrate and does not functionally couple the semiconductor device to the substrate. The plurality of contact vias fall within a first region of a vertical projection area of the connecting structure but do not overlap a second region of the vertical projection area.