公开(公告)号：US11244858B2

公开(公告)日：2022-02-08

申请号：US16679940

申请日：2019-11-11

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Kuan-Wei Huang ,  Cheng-Li Fan ,  Yu-Yu Chen

IPC分类号： H01L21/768 ,  H01L23/535 ,  H01L21/033 ,  H01L23/522 ,  H01L23/532 ,  H01L21/311

摘要： A method for reducing wiggling in a line includes forming a first patterning layer over a metal feature and depositing a first mask layer over the first patterning layer. The first mask layer is patterned to form a first set of one or more openings therein and then thinned. The pattern of the first mask layer is transferred to the first patterning layer to form a second set of one or more openings therein. The first patterning layer is etched to widen the second set of one or more openings. The first patterning layer may be comprised of silicon or an oxide material. The openings in the first patterning layer may be widened while a mask layer is over the first patterning layer.

公开(公告)号：US20190326127A1

公开(公告)日：2019-10-24

申请号：US16458636

申请日：2019-07-01

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Cheng-Li Fan ,  Chih-Hao Chen ,  Wen-Yen Chen

IPC分类号： H01L21/311 ,  H01L21/768 ,  H01L21/033

摘要： Methods for patterning in a semiconductor process are described. A dummy layer is formed having a cut therein. A first sacrificial layer is formed over the dummy layer, and at least a portion of the first sacrificial layer is disposed in the cut. A second sacrificial layer is formed over the first sacrificial layer. The second sacrificial layer is patterned to have a first pattern. Using the first pattern of the second sacrificial layer, the first sacrificial layer is patterned to have the first pattern. The second sacrificial layer is removed. Thereafter, a second pattern in the first sacrificial layer is formed comprising altering a dimension of the first pattern of the first sacrificial layer. Using the second pattern of the first sacrificial layer, the dummy layer is patterned. Mask portions are formed along respective sidewalls of the patterned dummy layer. The mask portions are used to form a mask.

公开(公告)号：US11594419B2

公开(公告)日：2023-02-28

申请号：US17113734

申请日：2020-12-07

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Jiann-Horng Lin ,  Cheng-Li Fan ,  Chih-Hao Chen

IPC分类号： H01L29/76 ,  H01L21/308 ,  H01L21/768 ,  H01L21/3213 ,  H01L21/033 ,  H01L21/311

摘要： A method for reducing wiggling in a line includes forming a silicon patterning layer over a substrate and depositing a mask layer over the silicon patterning layer. The mask layer is patterned to form one or more openings therein. The mask layer is thinned and the one or more openings are widened, to provide a smaller height-to-width ratio. The pattern of the mask layer is then used to pattern the silicon patterning layer. The silicon patterning layer is used, in turn, to pattern a target layer where a metal line will be formed.

公开(公告)号：US10861705B2

公开(公告)日：2020-12-08

申请号：US15871675

申请日：2018-01-15

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Jiann-Horng Lin ,  Cheng-Li Fan ,  Chih-Hao Chen

IPC分类号： H01L29/76 ,  H01L21/308 ,  H01L21/768 ,  H01L21/3213 ,  H01L21/033 ,  H01L21/311

摘要： A method for reducing wiggling in a line includes forming a silicon patterning layer over a substrate and depositing a mask layer over the silicon patterning layer. The mask layer is patterned to form one or more openings therein. The mask layer is thinned and the one or more openings are widened, to provide a smaller height-to-width ratio. The pattern of the mask layer is then used to pattern the silicon patterning layer. The silicon patterning layer is used, in turn, to pattern a target layer where a metal line will be formed.

公开(公告)号：US20200075405A1

公开(公告)日：2020-03-05

申请号：US16679940

申请日：2019-11-11

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Kuan-Wei Huang ,  Cheng-Li Fan ,  Yu-Yu Chen

IPC分类号： H01L21/768 ,  H01L23/532 ,  H01L21/311 ,  H01L23/522 ,  H01L21/033 ,  H01L23/535

摘要： A method for reducing wiggling in a line includes forming a first patterning layer over a metal feature and depositing a first mask layer over the first patterning layer. The first mask layer is patterned to form a first set of one or more openings therein and then thinned. The pattern of the first mask layer is transferred to the first patterning layer to form a second set of one or more openings therein. The first patterning layer is etched to widen the second set of one or more openings. The first patterning layer may be comprised of silicon or an oxide material. The openings in the first patterning layer may be widened while a mask layer is over the first patterning layer.

公开(公告)号：US20190067022A1

公开(公告)日：2019-02-28

申请号：US15871675

申请日：2018-01-15

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Jiann-Horng Lin ,  Cheng-Li Fan ,  Chih-Hao Chen

IPC分类号： H01L21/308 ,  H01L21/768

摘要： A method for reducing wiggling in a line includes forming a silicon patterning layer over a substrate and depositing a mask layer over the silicon patterning layer. The mask layer is patterned to form one or more openings therein. The mask layer is thinned and the one or more openings are widened, to provide a smaller height-to-width ratio. The pattern of the mask layer is then used to pattern the silicon patterning layer. The silicon patterning layer is used, in turn, to pattern a target layer where a metal line will be formed.

公开(公告)号：US10535532B2

公开(公告)日：2020-01-14

申请号：US16458636

申请日：2019-07-01

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Cheng-Li Fan ,  Chih-Hao Chen ,  Wen-Yen Chen

IPC分类号： H01L21/311 ,  H01L21/768 ,  H01L21/033

摘要： Methods for patterning in a semiconductor process are described. A dummy layer is formed having a cut therein. A first sacrificial layer is formed over the dummy layer, and at least a portion of the first sacrificial layer is disposed in the cut. A second sacrificial layer is formed over the first sacrificial layer. The second sacrificial layer is patterned to have a first pattern. Using the first pattern of the second sacrificial layer, the first sacrificial layer is patterned to have the first pattern. The second sacrificial layer is removed. Thereafter, a second pattern in the first sacrificial layer is formed comprising altering a dimension of the first pattern of the first sacrificial layer. Using the second pattern of the first sacrificial layer, the dummy layer is patterned. Mask portions are formed along respective sidewalls of the patterned dummy layer. The mask portions are used to form a mask.

公开(公告)号：US10475700B2

公开(公告)日：2019-11-12

申请号：US15726035

申请日：2017-10-05

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Kuan-Wei Huang ,  Cheng-Li Fan ,  Yu-Yu Chen

IPC分类号： H01L21/768 ,  H01L23/535 ,  H01L21/033 ,  H01L23/522 ,  H01L23/532 ,  H01L21/311

摘要： A method for reducing wiggling in a line includes forming a first patterning layer over a metal feature and depositing a first mask layer over the first patterning layer. The first mask layer is patterned to form a first set of one or more openings therein and then thinned. The pattern of the first mask layer is transferred to the first patterning layer to form a second set of one or more openings therein. The first patterning layer is etched to widen the second set of one or more openings. The first patterning layer may be comprised of silicon or an oxide material. The openings in the first patterning layer may be widened while a mask layer is over the first patterning layer.

公开(公告)号：US20210118688A1

公开(公告)日：2021-04-22

申请号：US17113734

申请日：2020-12-07

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Jiann-Horng Lin ,  Cheng-Li Fan ,  Chih-Hao Chen

IPC分类号： H01L21/308 ,  H01L21/768 ,  H01L21/3213 ,  H01L21/033 ,  H01L21/311

摘要： A method for reducing wiggling in a line includes forming a silicon patterning layer over a substrate and depositing a mask layer over the silicon patterning layer. The mask layer is patterned to form one or more openings therein. The mask layer is thinned and the one or more openings are widened, to provide a smaller height-to-width ratio. The pattern of the mask layer is then used to pattern the silicon patterning layer. The silicon patterning layer is used, in turn, to pattern a target layer where a metal line will be formed.

公开(公告)号：US20190067096A1

公开(公告)日：2019-02-28

申请号：US15726035

申请日：2017-10-05

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Kuan-Wei Huang ,  Cheng-Li Fan ,  Yu-Yu Chen

IPC分类号： H01L21/768 ,  H01L23/535 ,  H01L21/033 ,  H01L23/532 ,  H01L23/522

摘要： A method for reducing wiggling in a line includes forming a first patterning layer over a metal feature and depositing a first mask layer over the first patterning layer. The first mask layer is patterned to form a first set of one or more openings therein and then thinned. The pattern of the first mask layer is transferred to the first patterning layer to form a second set of one or more openings therein. The first patterning layer is etched to widen the second set of one or more openings. The first patterning layer may be comprised of silicon or an oxide material. The openings in the first patterning layer may be widened while a mask layer is over the first patterning layer.