公开(公告)号：US09038010B2

公开(公告)日：2015-05-19

申请号：US14058478

申请日：2013-10-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yao-Jen Chuang ,  Nien-Yu Tsai ,  Wen-Ju Yang

IPC: G06F17/50 ,  G06F9/455

CPC classification number: G06F17/5081

Abstract: The present disclosure relates a method of performing a design rule checking (DRC) procedure on a multi-tiered integrated chip. In some embodiments, the method is performed by defining layer databases for a plurality of tiers within a multi-tiered integrated chip. The layer databases respectively identify design layers within an associated tier. A DRC (design rule checking) deck is then generated, which defines one or more individual design layer definitions as a function of a plurality of layer databases, so that the one or more individual design layer definitions are defined for a plurality of tiers. One or more design rules for the one or more individual design layer definitions are defined within the DRC deck. Since the individual design layer definitions are defined as functions of the plurality of layer databases, the design rules apply to the plurality of tiers.

Abstract translation: 本公开涉及在多层集成芯片上执行设计规则检查（DRC）过程的方法。 在一些实施例中，通过为多层集成芯片内的多个层定义层数据库来执行该方法。 层数据库分别标识相关层内的设计层。 然后生成DRC（设计规则检查）甲板，其定义作为多个层数据库的函数的一个或多个单独的设计层定义，从而为多个层定义一个或多个单独的设计层定义。 一个或多个单独的设计层定义的一个或多个设计规则在DRC平台内被定义。 由于各个设计层定义被定义为多个层数据库的功能，所以设计规则适用于多个层。

公开(公告)号：US20150113489A1

公开(公告)日：2015-04-23

申请号：US14058478

申请日：2013-10-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yao-Jen Chuang ,  Nien-Yu Tsai ,  Wen-Ju Yang

IPC: G06F17/50

CPC classification number: G06F17/5081

Abstract: The present disclosure relates a method of performing a design rule checking (DRC) procedure on a multi-tiered integrated chip. In some embodiments, the method is performed by defining layer databases for a plurality of tiers within a multi-tiered integrated chip. The layer databases respectively identify design layers within an associated tier. A DRC (design rule checking) deck is then generated, which defines one or more individual design layer definitions as a function of a plurality of layer databases, so that the one or more individual design layer definitions are defined for a plurality of tiers. One or more design rules for the one or more individual design layer definitions are defined within the DRC deck. Since the individual design layer definitions are defined as functions of the plurality of layer databases, the design rules apply to the plurality of tiers.

Abstract translation: 本公开涉及在多层集成芯片上执行设计规则检查（DRC）过程的方法。 在一些实施例中，通过为多层集成芯片内的多个层定义层数据库来执行该方法。 层数据库分别标识相关层内的设计层。 然后生成DRC（设计规则检查）甲板，其定义作为多个层数据库的函数的一个或多个单独的设计层定义，从而为多个层定义一个或多个单独的设计层定义。 一个或多个单独的设计层定义的一个或多个设计规则在DRC平台内被定义。 由于各个设计层定义被定义为多个层数据库的功能，所以设计规则适用于多个层。