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公开(公告)号:US11901189B2
公开(公告)日:2024-02-13
申请号:US16951955
申请日:2020-11-18
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chen-Fong Tsai , Ya-Lun Chen , Tsai-Yu Huang , Yahru Cheng , Huicheng Chang , Yee-Chia Yeo
IPC: H01L21/3105 , H01L21/027 , G03F7/16 , H01L21/311
CPC classification number: H01L21/31058 , G03F7/162 , G03F7/168 , H01L21/0276 , H01L21/31144
Abstract: To reduce a thickness variation of a spin-on coating (SOC) layer that is applied over a plurality of first and second trenches with different pattern densities as a bottom layer in a photoresist stack, a two-step thermal treatment process is performed on the SOC layer. A first thermal treatment step in the two-step thermal treatment process is conducted at a first temperature below a cross-linking temperature of the SOC layer to cause flow of the SOC layer, and a second thermal treatment step in the two-step thermal treatment process is conducted at a second temperature to cause cross-linking of the SOC layer.
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公开(公告)号:US12087592B2
公开(公告)日:2024-09-10
申请号:US18446416
申请日:2023-08-08
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chen-Fong Tsai , Ya-Lun Chen , Tsai-Yu Huang , Yahru Cheng , Huicheng Chang , Yee-Chia Yeo
IPC: H01L21/3105 , G03F7/16 , H01L21/027 , H01L21/311
CPC classification number: H01L21/31058 , G03F7/162 , G03F7/168 , H01L21/0276 , H01L21/31144
Abstract: To reduce a thickness variation of a spin-on coating (SOC) layer that is applied over a plurality of first and second trenches with different pattern densities as a bottom layer in a photoresist stack, a two-step thermal treatment process is performed on the SOC layer. A first thermal treatment step in the two-step thermal treatment process is conducted at a first temperature below a cross-linking temperature of the SOC layer to cause flow of the SOC layer, and a second thermal treatment step in the two-step thermal treatment process is conducted at a second temperature to cause cross-linking of the SOC layer.
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公开(公告)号:US20210272816A1
公开(公告)日:2021-09-02
申请号:US16951955
申请日:2020-11-18
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chen-Fong Tsai , Ya-Lun Chen , Tsai-Yu Huang , Yahru Cheng , Huicheng Chang , Yee-Chia Yeo
IPC: H01L21/3105 , H01L21/027 , H01L21/311 , G03F7/16
Abstract: To reduce a thickness variation of a spin-on coating (SOC) layer that is applied over a plurality of first and second trenches with different pattern densities as a bottom layer in a photoresist stack, a two-step thermal treatment process is performed on the SOC layer. A first thermal treatment step in the two-step thermal treatment process is conducted at a first temperature below a cross-linking temperature of the SOC layer to cause flow of the SOC layer, and a second thermal treatment step in the two-step thermal treatment process is conducted at a second temperature to cause cross-linking of the SOC layer.
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