公开(公告)号：US20140137062A1

公开(公告)日：2014-05-15

申请号：US13677380

申请日：2012-11-15

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Ping-Hung Yuh ,  Hsin-Yun Lin ,  Cheng-I Huang ,  Chung-Hsing Wang

IPC: G06F17/50

CPC classification number: G06F17/50 ,  G06F17/5036 ,  G06F17/5081

Abstract: The present disclosure relates to a method and apparatus for accurate RC extraction. A pattern database is configured to store layout patterns and their associated 3D extraction parameters. A pattern-matching tool is configured to partition a design into a plurality of patterns, and to search the pattern database for a respective pattern and associated 3D extraction parameters. If the respective pattern is already stored in the pattern database, then the associated 3D extraction parameters stored in the database are assigned to the respective pattern without the need to extract the respective pattern. If the respective pattern is not stored in the pattern database, then the extraction tool extracts the pattern and stores its associated 3D extraction parameters in the pattern database for future use. In this manner a respective pattern is extracted only once for a given design or plurality of designs. Moreover, the extraction result may be applied multiple times for a given design simultaneously, speeding up computation time. The extraction result may also be applied to a plurality of designs simultaneously.

Abstract translation: 本公开涉及一种用于精确RC提取的方法和装置。 模式数据库被配置为存储布局模式及其相关的3D提取参数。 模式匹配工具被配置为将设计分割成多个模式，并且搜索模式数据库中的相应模式和相关联的3D提取参数。 如果相应的图案已经存储在图案数据库中，则存储在数据库中的相关3D提取参数被分配给相应的图案，而不需要提取相应的图案。 如果相应的图案不存储在图案数据库中，则提取工具提取图案并将其相关联的3D提取参数存储在图案数据库中以供将来使用。 以这种方式，对于给定的设计或多个设计，相应的图案仅被提取一次。 此外，提取结果可以同时应用于给定设计的多次，从而加快了计算时间。 提取结果也可以同时应用于多个设计。

公开(公告)号：US20170122998A1

公开(公告)日：2017-05-04

申请号：US14926434

申请日：2015-10-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Te-Yu Liu ,  Cheng Hsiao ,  Chia-Yi Chen ,  Wen-Cheng Huang ,  Ke-Wei Su ,  Ke-Ying Su ,  Ping-Hung Yuh

IPC: G01R31/28

CPC classification number: G06F17/50 ,  G01R31/28 ,  G01R31/2856 ,  G06F17/5031 ,  G06F17/5077

Abstract: A method and a corresponding system for analyzing process variation and parasitic resistance-capacitance (RC) elements in an interconnect structure of an integrated circuit (IC) are provided. First descriptions of parasitic RC elements in an interconnect structure of an IC are generated. The first descriptions describe the parasitic RC elements respectively at a typical process corner and a peripheral process corner. Sensitivity values are generated at the peripheral process corner from the first descriptions. The sensitivity values respectively quantify how sensitive the parasitic RC elements are to process variation. The sensitivity values are combined into a second description of the parasitic RC elements that describes the parasitic RC elements as a function of a process variation parameter. Simulation is performed on the second description by repeatedly simulating the second description with different values for the process variation parameter.

公开(公告)号：US09904743B2

公开(公告)日：2018-02-27

申请号：US14926434

申请日：2015-10-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Te-Yu Liu ,  Cheng Hsiao ,  Chia-Yi Chen ,  Wen-Cheng Huang ,  Ke-Wei Su ,  Ke-Ying Su ,  Ping-Hung Yuh

IPC: G01R31/02 ,  G06F17/50 ,  G01R31/28

CPC classification number: G06F17/50 ,  G01R31/28 ,  G01R31/2856 ,  G06F17/5031 ,  G06F17/5077

Abstract: A method and a corresponding system for analyzing process variation and parasitic resistance-capacitance (RC) elements in an interconnect structure of an integrated circuit (IC) are provided. First descriptions of parasitic RC elements in an interconnect structure of an IC are generated. The first descriptions describe the parasitic RC elements respectively at a typical process corner and a peripheral process corner. Sensitivity values are generated at the peripheral process corner from the first descriptions. The sensitivity values respectively quantify how sensitive the parasitic RC elements are to process variation. The sensitivity values are combined into a second description of the parasitic RC elements that describes the parasitic RC elements as a function of a process variation parameter. Simulation is performed on the second description by repeatedly simulating the second description with different values for the process variation parameter.

公开(公告)号：US08732641B1

公开(公告)日：2014-05-20

申请号：US13677380

申请日：2012-11-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ping-Hung Yuh ,  Hsin-Yun Lin ,  Cheng-I Huang ,  Chung-Hsing Wang

IPC: G06F17/50

CPC classification number: G06F17/50 ,  G06F17/5036 ,  G06F17/5081

Abstract: The present disclosure relates to a method and apparatus for accurate RC extraction. A pattern database is configured to store layout patterns and their associated 3D extraction parameters. A pattern-matching tool is configured to partition a design into a plurality of patterns, and to search the pattern database for a respective pattern and associated 3D extraction parameters. If the respective pattern is already stored in the pattern database, then the associated 3D extraction parameters stored in the database are assigned to the respective pattern without the need to extract the respective pattern. If the respective pattern is not stored in the pattern database, then the extraction tool extracts the pattern and stores its associated 3D extraction parameters in the pattern database for future use. In this manner a respective pattern is extracted only once for a given design or plurality of designs. Moreover, the extraction result may be applied multiple times for a given design simultaneously, speeding up computation time. The extraction result may also be applied to a plurality of designs simultaneously.

Abstract translation: 本公开涉及一种用于精确RC提取的方法和装置。 模式数据库被配置为存储布局模式及其相关的3D提取参数。 模式匹配工具被配置为将设计分割成多个模式，并且搜索模式数据库中的相应模式和相关联的3D提取参数。 如果相应的图案已经存储在图案数据库中，则存储在数据库中的相关3D提取参数被分配给相应的图案，而不需要提取相应的图案。 如果相应的图案不存储在图案数据库中，则提取工具提取图案并将其相关联的3D提取参数存储在图案数据库中以供将来使用。 以这种方式，对于给定的设计或多个设计，相应的图案仅被提取一次。 此外，提取结果可以同时应用于给定设计的多次，从而加快了计算时间。 提取结果也可以同时应用于多个设计。