Serial bus repeater with low power state detection

    公开(公告)号:US12135676B2

    公开(公告)日:2024-11-05

    申请号:US17348813

    申请日:2021-06-16

    Abstract: A serial bus repeater includes a port circuit and a low power state detection circuit. The port circuit is configured to communicate via a serial bus. The low power state detection circuit includes a power state transaction identification circuit and a bus state identification circuit. The power state transaction identification circuit is configured to identify a power state transaction on the serial bus. The power state transaction is indicative of entering a reduced power state. The bus state identification circuit is configured to identify a value of termination resistance on the serial bus that is indicative of entering the reduced power state.

    Serial bus signal conditioner for detecting initiation of or return to high-speed signaling

    公开(公告)号:US11580053B2

    公开(公告)日:2023-02-14

    申请号:US17347920

    申请日:2021-06-15

    Abstract: A serial bus signal conditioner circuit includes receiver circuitry, a mode identification circuit, and an edge-rate booster circuit. The receiver circuitry is configured to receive signals transmitted on a serial bus. The mode identification circuit is coupled to the receiver circuitry, and is configured to identify initiation of or return to high-speed signaling on the serial bus based on sequences of the signals transmitted on the serial bus. The edge-rate booster circuit is coupled to the mode identification circuit, and is configured to identify edges of a differential signal transmitted on the serial bus, and to supply a differential current to the serial bus based on identification of an edge of the differential signal.

    Embedded universal serial bus 2 repeater

    公开(公告)号:US10922255B2

    公开(公告)日:2021-02-16

    申请号:US16939725

    申请日:2020-07-27

    Abstract: Aspects of the disclosure provide for a circuit including a squelch detector having a first input coupled to a first node and configured to receive a positive component of a differential signal with a floating center tap, a second input coupled to a second node and configured to receive a negative component of the differential signal, and an output coupled to a logic circuit, a first resistor coupled between the first node and a third node, a second resistor coupled between the third node and the second node, a third resistor coupled between the first node and a fourth node, a fourth resistor coupled between the fourth node and the second node, a capacitor coupled between the fourth node and a ground terminal, a comparator having a first input coupled to the third node, a second input coupled to a fifth node, and an output coupled to the logic circuit.

    Power Consumption Reduction in USB 2.0 Redriver and In eUSB2 Repeater

    公开(公告)号:US20200257354A1

    公开(公告)日:2020-08-13

    申请号:US16717836

    申请日:2019-12-17

    Abstract: A method includes detecting a micro start of frame packet (μSOF) on a data bus. If there is at least one data packet contained in a microframe during the first threshold period after the μSOF, transmitters are held in an active state. If there is no data packet in the first threshold period after the μSOF, the transmitters are transitioned from the active state to an OFF state. The method also includes transitioning the transmitters from the OFF state to the active state prior to a switchback period before the end of the microframe. The method also includes transitioning the transmitters from the OFF state to the active state if a data packet is received in the OFF state. The method also includes dropping the data packet received in the OFF state and transitioning from the OFF state to the active state when the data packet is dropped.

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