公开(公告)号：US20240222310A1

公开(公告)日：2024-07-04

申请号：US18090922

申请日：2022-12-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Gregory OSTROWICKI ,  Amit NANGIA ,  Kashyap MOHAN

IPC: H01L23/00 ,  H01L21/56

CPC classification number: H01L24/32 ,  H01L21/565 ,  H01L24/16 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32227 ,  H01L2224/73253 ,  H01L2924/351

Abstract: In examples, a semiconductor package comprises a substrate having multiple conductive layers coupled to bond pads at a surface of the substrate. The package includes a semiconductor die including a device side facing the substrate, the device side having first and second circuitry regions, the first circuitry region having greater sensitivity to at least one of mechanical or thermal stress than the second circuitry region. The package also includes conductive members coupled to the bond pads of the substrate, in direct physical contact with the second circuitry region, and not in direct physical contact with the first circuitry region. The package further comprises a first support member coupled to the device side of the semiconductor die and extending toward the substrate and not touching the substrate or a second support member coupled to the substrate. The package also includes a ring on the substrate and encircling the bond pads and a glob top member covering the semiconductor die and a portion of the substrate circumscribed by the ring. The package also includes a mold compound covering the glob top member and the substrate.