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公开(公告)号：US20210409246A1
公开(公告)日：2021-12-30
申请号：US17095869
申请日：2020-11-12
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Abishek MANIAN , Ashwin Kottilvalappil VIJAYAN , Amit RANE , Ashkan ROSHAN ZAMIR
Abstract: An N-tap feedforward equalizer (FFE) comprises a set of N FFE taps coupled together in parallel, a filter coupled between the (N−1)th FFE tap and the Nth FFE tap, and a summer coupled to an output of the set of N FFE taps. Each FFE tap includes a unique sample-an-hold (S/H) circuit that generates a unique time-delayed signal and a unique transconductance stage that generates a unique transconductance output based on the unique time-delayed signal. The filter causes the N-tap FFE to have the behavior of greater than N taps. In some examples, the filter is a first order high pass filter that causes coefficients greater than N to have an opposite polarity of the Nth coefficient. In some examples, the filter is a first order low pass filter that causes coefficients greater than N to have the same polarity as the Nth coefficient.
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公开(公告)号：US20240137198A1
公开(公告)日：2024-04-25
申请号：US18309587
申请日：2023-04-27
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Abishek MANIAN , Ashkan ROSHAN ZAMIR , Yonghui TANG , Robin GUPTA , Michael G. VRAZEL
CPC classification number: H04L7/0016 , H04L25/03012
Abstract: A receiver includes: equalizer circuitry; clock and data recovery (CDR) circuitry; sampler circuitry; adaptation circuitry; and clock adjustment circuitry. The receiver is configured to: receive data via a channel; perform equalization operations on received data, the equalization operations resulting in equalization results; perform sampling operations responsive to the equalization results, the sampling operations resulting in data samples and error samples; perform adaptation operations responsive to the data samples and the error samples, the adaptation operations resulting in a clock adjustment control signal; and adjust a sampling clock signal relative to a CDR clock signal responsive to the clock adjustment control signal.
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公开(公告)号：US20240235804A9
公开(公告)日：2024-07-11
申请号：US18309587
申请日：2023-04-28
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Abishek MANIAN , Ashkan ROSHAN ZAMIR , Yonghui TANG , Robin GUPTA , Michael G. VRAZEL
CPC classification number: H04L7/0016 , H04L25/03012
Abstract: A receiver includes: equalizer circuitry; clock and data recovery (CDR) circuitry; sampler circuitry; adaptation circuitry; and clock adjustment circuitry. The receiver is configured to: receive data via a channel; perform equalization operations on received data, the equalization operations resulting in equalization results; perform sampling operations responsive to the equalization results, the sampling operations resulting in data samples and error samples; perform adaptation operations responsive to the data samples and the error samples, the adaptation operations resulting in a clock adjustment control signal; and adjust a sampling clock signal relative to a CDR clock signal responsive to the clock adjustment control signal.
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