公开(公告)号：US20210096473A1

公开(公告)日：2021-04-01

申请号：US16587710

申请日：2019-09-30

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Ru-Gun LIU ,  Huicheng CHANG ,  Chia-Cheng CHEN ,  Jyu-Horng SHIEH ,  Liang-Yin CHEN ,  Shu-Huei SUEN ,  Wei-Liang LIN ,  Ya Hui CHANG ,  Yi-Nien SU ,  Yung-Sung YEN ,  Chia-Fong CHANG ,  Ya-Wen YEH ,  Yu-Tien SHEN

IPC分类号： G03F7/20 ,  H01L21/027

摘要： In a method of forming a pattern, a photo resist layer is formed over an underlying layer, the photo resist layer is exposed to an actinic radiation carrying pattern information, the exposed photo resist layer is developed to form a developed resist pattern, a directional etching operation is applied to the developed resist pattern to form a trimmed resist pattern, and the underlying layer is patterned using the trimmed resist pattern as an etching mask.

公开(公告)号：US20200052122A1

公开(公告)日：2020-02-13

申请号：US16657035

申请日：2019-10-18

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Ju-Wang HSU ,  Chih-Yuan TING ,  Tang-Xuan ZHONG ,  Yi-Nien SU ,  Jang-Shiang TSAI

IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L29/06

摘要： Methods for manufacturing semiconductor structures are provided. The method includes forming a first masking layer over a substrate and forming a second masking layer over the first masking layer. The method includes forming a photoresist pattern over the second masking layer and patterning the second masking layer through the photoresist pattern. The method further includes diminishing the photoresist pattern and patterning the second masking layer and the first masking layer through the diminished photoresist pattern. The method further includes removing the diminished photoresist pattern and patterning the semiconductor substrate through the second masking layer and the first masking layer to form a fin structure. The method further includes forming a gate structure over the fin structure.

公开(公告)号：US20150137265A1

公开(公告)日：2015-05-21

申请号：US14582576

申请日：2014-12-24

申请人： Taiwan Semiconductor Manufacturing Co., Ltd

发明人： Ju-Wang HSU ,  Chih-Yuan TING ,  Tang-Xuan ZHONG ,  Yi-Nien SU ,  Jang-Shiang TSAI

IPC分类号： H01L29/78 ,  H01L29/06

CPC分类号： H01L29/7851 ,  H01L29/0649 ,  H01L29/66795 ,  H01L29/7853

摘要： A fin field effect transistor and method of forming the same. The fin field effect transistor includes a semiconductor substrate having a fin structure and between two trenches with top portions and bottom portions. The fin field effect transistor further includes shallow trench isolations formed in the bottom portions of the trenches and a gate electrode over the fin structure and the shallow trench isolation, wherein the gate electrode is substantially perpendicular to the fin structure. The fin field effect transistor further includes a gate dielectric layer along sidewalls of the fin structure and source/drain electrode formed in the fin structure.

摘要翻译： 翅片场效应晶体管及其形成方法。 翅片场效应晶体管包括具有翅片结构的半导体衬底和具有顶部和底部的两个沟槽之间。 鳍状场效应晶体管还包括在沟槽的底部形成的浅沟槽隔离物和鳍状结构上的栅电极和浅沟槽隔离，其中栅电极基本上垂直于鳍结构。 翅片场效应晶体管还包括沿翅片结构的侧壁和形成在鳍结构中的源/漏电极的栅介质层。