公开(公告)号：US20210375317A1

公开(公告)日：2021-12-02

申请号：US16978960

申请日：2019-01-25

申请人： Sony Semiconductor Solutions Corporation ,  Sony Corporation

发明人： Hiroaki NAKANO ,  Hiroaki FUJITA ,  Eiji NAKASHIO

IPC分类号： G11B23/087 ,  G06K19/07 ,  H04B5/02

摘要： [Solving Means] A non-contact communication medium according to an embodiment of the present technology includes: a voltage generation unit; a memory unit; a clock signal generation unit; and a control unit. The voltage generation unit includes an antenna coil for transmission/reception, and receives a signal magnetic field from an external device to generate a voltage. The memory unit stores one or more circuit parameters set in the voltage generation unit, and predetermined management information. The clock signal generation unit is configured to be capable of selectively generating clock signals having two or more different frequencies. The control unit is configured to select a frequency of a clock signal to be supplied to the memory unit from the clock signal generation unit.

公开(公告)号：US20200321966A1

公开(公告)日：2020-10-08

申请号：US16097658

申请日：2017-04-27

申请人： SONY CORPORATION

发明人： Makoto MASUDA ,  Hiroaki FUJITA ,  Tetsuya FUJIWARA

IPC分类号： H03L7/085 ,  H03K21/08 ,  H03K19/20 ,  H03K3/037 ,  G01R31/317

摘要： The present technology relates to a detection device and a detection method that are designed to be capable of detecting a locked state with a higher degree of accuracy.A first edge detector detects whether there is an edge of a second clock signal in one cycle of a first clock signal. A second edge detector detects whether there is an edge of the first clock signal in one cycle of the second clock signal. The logic circuit performs a logical operation on a detection result from the first edge detector and a detection result from the second edge detector. The present technology can be applied to a circuit or the like that detects a locked state of a PLL circuit, for example.