公开(公告)号：US20130115765A1

公开(公告)日：2013-05-09

申请号：US13626762

申请日：2012-09-25

申请人： SILICONIX TECHNOLOGY C.V.IR

发明人： Andrea Irace ,  Giovanni Breglio ,  Paolo Spirito ,  Andrea Bricconi ,  Diego Raffo ,  Luigi Merlin

IPC分类号： H01L29/66

CPC分类号： H01L29/66007 ,  H01L29/06 ,  H01L29/66143 ,  H01L29/872

摘要： A semiconductor device in one embodiment includes a depletion junction, a peripheral region adjacent the depletion junction, and a buffer layer. The buffer layer is adapted to reduce localization of avalanche breakdown proximate the interface between the depletion junction and the peripheral region.

公开(公告)号：US08685849B2

公开(公告)日：2014-04-01

申请号：US13626762

申请日：2012-09-25

申请人： Siliconix Technology C.V.IR

发明人： Andrea Irace ,  Giovanni Breglio ,  Paolo Spirito ,  Andrea Bricconi ,  Diego Raffo ,  Luigi Merlin

IPC分类号： H01L21/28 ,  H01L21/44

CPC分类号： H01L29/66007 ,  H01L29/06 ,  H01L29/66143 ,  H01L29/872

摘要： A semiconductor device in one embodiment includes a depletion junction, a peripheral region adjacent the depletion junction, and a buffer layer. The buffer layer is adapted to reduce localization of avalanche breakdown proximate the interface between the depletion junction and the peripheral region.

摘要翻译： 一个实施例中的半导体器件包括耗尽结，与耗尽结邻近的外围区和缓冲层。 缓冲层适于减少靠近耗尽结和周边区域之间的界面处的雪崩击穿的定位。