公开(公告)号：US08568597B2

公开(公告)日：2013-10-29

申请号：US12662874

申请日：2010-05-10

Applicant: Shyang Su ,  Yi-Heng Su ,  Michael Vukelic

Inventor： Shyang Su ,  Yi-Heng Su ,  Michael Vukelic

IPC: B01D24/28

CPC classification number: C01B33/10784

Abstract: A process is disclosed for purification of silicon source material including trichlorosilane. First, the silicon source material in liquid state with impurities vapor and the other chlorosilane or silane are passing a first high gravity rotating packed bed with porous metal, at a temperature lower than the boiling point of the silicon source material, the impurities vapor and the other chlorosilane or silane are separated from the liquid silicon source material; second, the silicon source material in liquid state is fed to a second high gravity rotating packed bed, oxygen is also fed to the second high gravity rotating packed bed to form impurity-containing siloxane complexes with higher boiling point. Finally distilling to remove the impurity-containing siloxane complexes from the silicon source material.

Abstract translation: 公开了用于纯化包括三氯硅烷在内的硅源材料的方法。 首先，具有杂质蒸气的液态硅源材料和其它氯代硅烷或硅烷在低于硅源材料的沸点，杂质蒸气和 其他氯硅烷或硅烷与液态硅源材料分离; 第二，液态的硅源材料被送入第二高重力旋转填充床，氧也被供给到第二高重力旋转填充床，以形成具有较高沸点的含杂质的硅氧烷配合物。 最后蒸馏以从硅源材料中除去含杂质的硅氧烷配合物。

公开(公告)号：US20110274608A1

公开(公告)日：2011-11-10

申请号：US12662874

申请日：2010-05-10

Applicant: Shyang Su ,  Yi-Heng Su ,  Michael Vukelic

Inventor： Shyang Su ,  Yi-Heng Su ,  Michael Vukelic

IPC: C01B33/107

CPC classification number: C01B33/10784

Abstract: A process is disclosed for purification of silicon source material including trichlorosilane. First, the silicon source material in liquid state with impurities vapor and the other chlorosilane or silane are passing a first high gravity rotating packed bed with spongy metal, at a temperature lower than the boiling point of the silicon source material, the impurities vapor and the other chlorosilane or silane are separated from the liquid silicon source material; second, the silicon source material in liquid state is fed to a second high gravity rotating packed bed, oxygen is also fed to the second high gravity rotating packed bed to form impurity containing siloxane complexes with higher boiling point. Finally distilling to remove the impurity containing siloxane complexes from the silicon source material.

Abstract translation: 公开了用于纯化包括三氯硅烷在内的硅源材料的方法。 首先，具有杂质蒸气的液态硅源材料和其它氯代硅烷或硅烷通过具有海绵状金属的第一高重力旋转填充床，其温度低于硅源材料的沸点，杂质蒸气和 其他氯硅烷或硅烷与液态硅源材料分离; 第二，液态硅源材料被送入第二高重力旋转填充床，氧也被供给到第二高重力旋转填充床，以形成含有较高沸点的含硅氧烷配合物的杂质。 最后蒸馏以从硅源材料中除去含有硅氧烷配合物。

公开(公告)号：US5773870A

公开(公告)日：1998-06-30

申请号：US709827

申请日：1996-09-10

Applicant: Shyang Su ,  Jeng Tzong Sheu ,  Kuen Joung Chuang

Inventor： Shyang Su ,  Jeng Tzong Sheu ,  Kuen Joung Chuang

IPC: H01L21/02 ,  H01L23/522 ,  H01L29/00

CPC classification number: H01L28/10 ,  H01L23/5227 ,  H01L2924/0002

Abstract: A membrane type integrated inductor includes an integrated inductor laid out on the upper plane of a membrane. The process to manufacture a membrane type integrated inductor includes the following steps: forming a thin dielectric layer at the outer portion of a substrate; forming a wire-wound integrated inductor thin dielectric layer with the known technique; defining an open window on the back of the substrate below the inductor through the backside etch; and forming a membrane type integrated inductor by using the thin dielectric layer on the silicon substrate as the etching stop. One embodiment uses silicon dioxide as the membrane layer. The low dielectric constant of SiO.sub.2 may be used to lower the power loss during the lay out of the circuit parts, to effectively raise the induction value, to lower the parasitic capacitance, to increase the resonance frequency, to decrease the volume of the chip which the inductor utilized, and to raise the quality factor.

Abstract translation: 膜式集成电感器包括布置在膜的上平面上的集成电感器。 制造膜式集成电感器的过程包括以下步骤：在衬底的外部形成薄的电介质层; 用已知技术形成绕线集成电感器薄介电层; 通过背面蚀刻在电感器下面的衬底的背面限定开窗; 并且通过使用硅衬底上的薄介电层作为蚀刻停止件来形成膜式集成电感器。 一个实施例使用二氧化硅作为膜层。 可以使用SiO 2的低介电常数来降低在电路部件布置期间的功率损耗，以有效地提高感应值，降低寄生电容，增加谐振频率，以减小芯片的体积 利用电感，提高品质因素。

公开(公告)号：US06236297B1

公开(公告)日：2001-05-22

申请号：US09136505

申请日：1998-08-19

Applicant: Kuo-Yu Chou ,  Shyang Su ,  Jen-Tsai Kuo

Inventor： Kuo-Yu Chou ,  Shyang Su ,  Jen-Tsai Kuo

IPC: H01F2728

CPC classification number: H01F17/0006 ,  H01L23/5227 ,  H01L23/645 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A combinational inductor, which can be constructed on a surface of a semiconductor substrate or an isolator, is provided. The combinational inductor includes several spiral inductors which are connected together in series. The spiral inductors can be constructed on the same layer to produce a combinational inductor structure, because of the same metalization process used. In another aspect, connecting methods between neighboring spiral conductors include forward cascade and reverse cascade. A spiral conductor has at least one neighboring spiral conductor which is connected with it in reverse cascade. The inductance per unit square measurement of the inductor in series can be significantly increased through the connections between neighboring spiral conductors either in forward cascade or reverse cascade.

Abstract translation: 提供了可以构造在半导体衬底或隔离器的表面上的组合电感器。 组合电感器包括串联连接在一起的多个螺旋电感器。 由于使用相同的金属化工艺，螺旋电感器可以构造在同一层上以产生组合电感器结构。 另一方面，相邻螺旋导体之间的连接方法包括向前级联和反向级联。 螺旋导体具有至少一个相邻的螺旋导体，其以反向级联连接。 串联的电感器每单位平方测量的电感可以通过前级联或反向级联的相邻螺旋导体之间的连接显着增加。