公开(公告)号：US20110140165A1

公开(公告)日：2011-06-16

申请号：US12899758

申请日：2010-10-07

申请人： Shigeru KUSUNOKI ,  Junji Yahiro ,  Yoshihiko Hirota

发明人： Shigeru KUSUNOKI ,  Junji Yahiro ,  Yoshihiko Hirota

IPC分类号： H01L29/739

CPC分类号： H01L29/7397 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L25/16 ,  H01L27/0658 ,  H01L27/0761 ,  H01L29/0623 ,  H01L29/0661 ,  H01L29/404 ,  H01L29/8611 ,  H01L2224/0603 ,  H01L2224/48091 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/12036 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2224/45099 ,  H01L2924/00

摘要： A high voltage semiconductor device includes a semiconductor substrate, a p type base region in a first main surface, an n+ type emitter region in the p type base region, an n+ type cathode region adjacent to an end surface of the semiconductor substrate and not penetrating the semiconductor substrate, a p+ type collector region in a second main surface, a first main electrode, a second main electrode, a third main electrode, and a connection portion connecting the second main electrode and the third main electrode. A resistance between the p type base region and the n+ type cathode region is greater than a resistance between the p type base region and the p+ type collector region. In the high voltage semiconductor device in which an IGBT and a free wheel diode are formed in a single semiconductor substrate, occurrence of a snap-back phenomenon is suppressed.

摘要翻译： 高电压半导体器件包括半导体衬底，第一主表面中的ap型基极区域，p型基极区域中的n +型发射极区域，与半导体衬底的端面相邻的n +型阴极区域，并且不穿透 半导体衬底，第二主表面中的p +型集电极区域，第一主电极，第二主电极，第三主电极和连接第二主电极和第三主电极的连接部分。 p型基极区域和n +型阴极区域之间的电阻大于p型基极区域和p +型集电极区域之间的电阻。 在单个半导体基板中形成有IGBT和自由轮二极管的高电压半导体装置中，抑制了卡扣现象的发生。

公开(公告)号：US08253163B2

公开(公告)日：2012-08-28

申请号：US12899758

申请日：2010-10-07

申请人： Shigeru Kusunoki ,  Junji Yahiro ,  Yoshihiko Hirota

发明人： Shigeru Kusunoki ,  Junji Yahiro ,  Yoshihiko Hirota

IPC分类号： H01L29/739

CPC分类号： H01L29/7397 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L25/16 ,  H01L27/0658 ,  H01L27/0761 ,  H01L29/0623 ,  H01L29/0661 ,  H01L29/404 ,  H01L29/8611 ,  H01L2224/0603 ,  H01L2224/48091 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/12036 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2224/45099 ,  H01L2924/00

摘要： A high voltage semiconductor device includes a semiconductor substrate, a p type base region in a first main surface, an n+ type emitter region in the p type base region, an n+ type cathode region adjacent to an end surface of the semiconductor substrate and not penetrating the semiconductor substrate, a p+ type collector region in a second main surface, a first main electrode, a second main electrode, a third main electrode, and a connection portion connecting the second main electrode and the third main electrode. A resistance between the p type base region and the n+ type cathode region is greater than a resistance between the p type base region and the p+ type collector region. In the high voltage semiconductor device in which an IGBT and a free wheel diode are formed in a single semiconductor substrate, occurrence of a snap-back phenomenon is suppressed.

摘要翻译： 高电压半导体器件包括半导体衬底，第一主表面中的ap型基极区域，p型基极区域中的n +型发射极区域，与半导体衬底的端面相邻的n +型阴极区域，并且不穿透 半导体衬底，第二主表面中的p +型集电极区域，第一主电极，第二主电极，第三主电极和连接第二主电极和第三主电极的连接部分。 p型基极区域和n +型阴极区域之间的电阻大于p型基极区域和p +型集电极区域之间的电阻。 在单个半导体基板中形成有IGBT和自由轮二极管的高电压半导体装置中，抑制了卡扣现象的发生。

公开(公告)号：US08164111B2

公开(公告)日：2012-04-24

申请号：US12899758

申请日：2010-10-07

申请人： Shigeru Kusunoki ,  Junji Yahiro ,  Yoshihiko Hirota

发明人： Shigeru Kusunoki ,  Junji Yahiro ,  Yoshihiko Hirota

IPC分类号： H01L29/739

摘要： A high voltage semiconductor device includes a semiconductor substrate, a p type base region in a first main surface, an n+ type emitter region in the p type base region, an n+ type cathode region adjacent to an end surface of the semiconductor substrate and not penetrating the semiconductor substrate, a p+ type collector region in a second main surface, a first main electrode, a second main electrode, a third main electrode, and a connection portion connecting the second main electrode and the third main electrode. A resistance between the p type base region and the n+ type cathode region is greater than a resistance between the p type base region and the p+ type collector region. In the high voltage semiconductor device in which an IGBT and a free wheel diode are formed in a single semiconductor substrate, occurrence of a snap-back phenomenon is suppressed.