公开(公告)号：US20230244101A1

公开(公告)日：2023-08-03

申请号：US18102904

申请日：2023-01-30

Applicant: Sharp Display Technology Corporation

Inventor： Naru USUKURA ,  Masahiro IMAI ,  Yuhichiroh MURAKAMI ,  Takahiro YAMAGUCHI ,  Shige FURUTA

IPC: G02F1/1335 ,  G02F1/1368 ,  G02F1/1362 ,  G02F1/13357

CPC classification number: G02F1/133536 ,  G02F1/133504 ,  G02F1/133524 ,  G02F1/1368 ,  G02F1/136286 ,  G02F1/133603

Abstract: A display device includes an organic EL element layer, a liquid crystal element layer disposed on top of the organic EL element layer, and a polarizing plate disposed at a side of the liquid crystal element layer that faces an observer. The liquid crystal element layer includes two transparent substrates and a liquid crystal layer disposed between the two transparent substrates. The liquid crystal element layer is configured to be able to, by applying a voltage to the liquid crystal layer, cause a substantially quarter-wavelength retardation in light passing through the liquid crystal layer.

公开(公告)号：US20240402544A1

公开(公告)日：2024-12-05

申请号：US18611957

申请日：2024-03-21

Applicant: Sharp Display Technology Corporation

Inventor： Masahiro IMAI ,  Yasuyoshi KAISE ,  Takahiro YAMAGUCHI ,  Fumikazu SHIMOSHIKIRYOH

IPC: G02F1/1343 ,  G02F1/133 ,  G02F1/1362 ,  G02F1/1368

Abstract: A plurality of pixel electrodes each forming one pixel are provided on a TFT substrate. A size of a pixel electrode located at a boundary portion between a non-rectangular active area and a frame region, which is an area outside the active area, is smaller than a size of a pixel electrode not located at the boundary portion. In such a configuration, a voltage is always applied to the plurality of pixel electrodes.

公开(公告)号：US20250006089A1

公开(公告)日：2025-01-02

申请号：US18639329

申请日：2024-04-18

Applicant: Sharp Display Technology Corporation

Inventor： Takahiro YAMAGUCHI ,  Kohei HOSOYACHI ,  Yuhichiroh MURAKAMI ,  Shige FURUTA ,  Hidekazu YAMANAKA

IPC: G09G3/00 ,  G02F1/1345 ,  G02F1/1362 ,  G06F3/041 ,  G06F3/044 ,  G09G3/3233 ,  G09G3/36

Abstract: In an IC mounting region in which a driver IC is to be mounted in an active matrix substrate that is used in a display device, an inspection circuit is formed together with a plurality of driving-side pads for outputting, from the driver IC, a plurality of video data signals representing an image to be displayed. The inspection circuit includes a plurality of inspection transistors connected separately to each of these driving-side pads, inspection signal lines, and an inspecting control line. The inspection signal lines and the inspecting control line are placed opposite the driving-side pads across the inspection transistors, and there are no wire intersections between the inspection transistors and the driving-side pads.

公开(公告)号：US20240329473A1

公开(公告)日：2024-10-03

申请号：US18419597

申请日：2024-01-23

Applicant: Sharp Display Technology Corporation

Inventor： Shige FURUTA ,  Takahiro YAMAGUCHI ,  Kohei HOSOYACHI ,  Yuhichiroh MURAKAMI ,  Kiyohito ITOH

IPC: G02F1/1362 ,  G06F3/041 ,  H01L27/12

CPC classification number: G02F1/136286 ,  G02F1/136254 ,  G06F3/0412 ,  G06F3/0416 ,  H01L27/124

Abstract: A touch panel includes a first portion extending in a first direction within a pixel region, a source driving circuit, an inspection circuit, an input terminal region, and an inspection line extending in the first direction within a frame region. The inspection line is formed in a layer different from a layer where the first portion is formed. The inspection line is connected to the first portion and a second portion via a contact hole between a touch-detecting electrode and the source driving circuit. The second portion crosses the source driving circuit and the inspection circuit in a direction intersecting the first direction.

公开(公告)号：US20230244097A1

公开(公告)日：2023-08-03

申请号：US18099533

申请日：2023-01-20

Applicant: Sharp Display Technology Corporation

Inventor： Takahiro YAMAGUCHI ,  Shige FURUTA ,  Yuhichiroh MURAKAMI ,  Hiroyuki ADACHI

IPC: G02F1/133 ,  G02F1/1362 ,  G02F1/1345 ,  G02F1/1343 ,  G09G3/36

CPC classification number: G02F1/13306 ,  G02F1/136286 ,  G02F1/13454 ,  G02F1/13458 ,  G02F1/134309 ,  G09G3/36 ,  G09G3/3614 ,  G02F2201/40 ,  G09G2310/0286 ,  G09G2310/08

Abstract: A plurality of pixel electrodes are provided in a display region. A plurality of pixel transistors corresponding to the plurality of pixel electrodes in a one-to-one manner are provided in a region outside the display region. Each of the pixel transistors is connected to the corresponding pixel electrode by a pixel wiring line. An input pad group, to which a drive signal group for driving the plurality of pixel transistors is input, is provided on a TFT substrate. Here, of a region on the TFT substrate, the plurality of pixel transistors are provided only in a region other than a region between the input pad group and the display region.

公开(公告)号：US20230386424A1

公开(公告)日：2023-11-30

申请号：US18144063

申请日：2023-05-05

Applicant: Sharp Display Technology Corporation

Inventor： Yasushi SASAKI ,  Yuhichiroh MURAKAMI ,  Shuji NISHI ,  Takahiro YAMAGUCHI

IPC: G09G3/36

CPC classification number: G09G3/3629 ,  G09G3/3614 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0842 ,  G09G2310/0291 ,  G09G2310/0278 ,  G09G2330/021

Abstract: When binary pixel data is written to a pixel circuit, of an H-level (3V) and a L-level (0V), a voltage of the level indicating the binary pixel data is held at a first node, and a voltage of the inverted level thereof is held at a second node. The first and second nodes are connected to a third node via N-channel transistors, respectively, and first and second selection control signals are supplied to gate terminals of the transistors, respectively. Voltage levels of the first and second selection control signals are periodically switched between 5V indicating the H-level and 0V indicating the L-level in a mutually inverted manner. As a result, the voltage of the first node and the voltage of the second node are alternately selected and applied to a pixel electrode of a display element.