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公开(公告)号:US20240160067A1
公开(公告)日:2024-05-16
申请号:US18378090
申请日:2023-10-09
发明人: Masakatsu TOMINAGA
IPC分类号: G02F1/1362 , G02F1/1343 , G09G3/36 , H01L27/12
CPC分类号: G02F1/136295 , G02F1/134336 , G02F1/134372 , G09G3/3648 , H01L27/124 , G02F2201/121 , G02F2201/123
摘要: A liquid crystal display apparatus includes a TFT substrate including first and second gate bus lines, source bus lines, and pixels and a liquid crystal layer. The pixel includes a pixel electrode, a common electrode, an auxiliary electrode, and first to third TFTs. The gates of the first and second TFTs are connected to one of the first and second gate bus lines, and the drains are connected to the pixel electrode and the auxiliary electrode, respectively. The gate of the third TFT is connected to the other of the first and second gate bus lines, and the source and drain of the third TFT are connected to the pixel electrode and the auxiliary electrode, respectively. Gate signals are applied to the first and second gate bus lines so that the TFTs connected to the first and second gate bus lines are turned on at different points in time.
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公开(公告)号:US20240345445A1
公开(公告)日:2024-10-17
申请号:US18594182
申请日:2024-03-04
发明人: Masakatsu TOMINAGA
IPC分类号: G02F1/1362 , G02F1/1368 , G09G3/36
CPC分类号: G02F1/136286 , G02F1/13624 , G02F1/1368 , G09G3/3677 , G02F1/134372 , G09G2320/0257
摘要: A display panel including: a plurality of pixels arranged in a longitudinal direction and a lateral direction; a plurality of pixel electrodes; a common electrode; a first, second, third, and fourth gate lines extending in the lateral direction; and a first and second data lines, and a common line extending in the longitudinal direction, in which the plurality of pixels include a first pixel having a first pixel electrode and a second pixel adjacent to the first pixel in the lateral direction and having a second pixel electrode, the third gate line is arranged to overlap the first and the second pixel electrodes, the common line is arranged between the first and the second pixel electrodes, and the display panel further includes a first switching element connected to the first pixel electrode, the common line, and the third gate line, and a second switching element connected to the second pixel electrode, the common line, and the third gate line.
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公开(公告)号:US20230185142A1
公开(公告)日:2023-06-15
申请号:US18078428
申请日:2022-12-09
发明人: Masakatsu TOMINAGA
IPC分类号: G02F1/1362 , G02F1/1368 , G06F3/044
CPC分类号: G02F1/136286 , G02F1/1368 , G02F1/136222 , G02F1/136227 , G06F3/0446 , G06F3/0447
摘要: A first pixel electrode and a third pixel electrode are disposed on one side of one of a plurality of column lines. A second pixel electrode and a fourth pixel electrode are disposed on another side of the one of the plurality of column lines. A third switching element is disposed on the one side of the one of the plurality of column lines. A fourth switching element is disposed on the other side of the one of the plurality of column lines. The first pixel electrode is connected to a first switching element via a first connection electrode. The second pixel electrode is connected to a second switching element via a second connection electrode. The third pixel electrode is connected to the third switching element. The fourth pixel electrode is connected to the fourth switching element.
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公开(公告)号:US20240290293A1
公开(公告)日:2024-08-29
申请号:US18406439
申请日:2024-01-08
发明人: Masakatsu TOMINAGA
IPC分类号: G09G3/36
CPC分类号: G09G3/3659 , G09G2300/0426 , G09G2310/0213 , G09G2310/0278
摘要: A liquid crystal display device includes a display region including a first and second region adjacent in a first direction, a substrate with a width of the second region in the first direction being greater than a width of the first region, a plurality of first and second gate bus lines extending in a second direction and arranged in the first and second regions, and a first and second gate driver connected to the plurality of first and second gate bus lines, respectively. A first scanning period in which the first gate driver scans the first gate bus lines overlaps a part of a second scanning period in which the second gate driver scans the second gate bus lines.
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