Abstract:
Provided is a touch panel using a zinc oxide (ZnO) nano wire. The touch panel may include a first transparent substrate, a first transparent electrode layer on the first transparent substrate, a light transmissive nano wire layer including a plurality of piezoelectric nano wires that may be arranged on the first transparent electrode layer so as to be perpendicular to the first transparent electrode layer, a second transparent electrode layer on the nano wire layer, and a second transparent substrate on the second transparent electrode layer.
Abstract:
Provided is a touch panel using a zinc oxide (ZnO) nano wire. The touch panel may include a first transparent substrate, a first transparent electrode layer on the first transparent substrate, a light transmissive nano wire layer including a plurality of piezoelectric nano wires that may be arranged on the first transparent electrode layer so as to be perpendicular to the first transparent electrode layer, a second transparent electrode layer on the nano wire layer, and a second transparent substrate on the second transparent electrode layer.
Abstract:
Provided are an inverter, a method of operating the inverter, and a logic circuit including the inverter. The inverter may include a load transistor and a driving transistor, and at least one of the load transistor and the driving transistor may have a double gate structure. A threshold voltage of the load transistor or the driving transistor may be adjusted by the double gate structure, and accordingly, the inverter may be an enhancement/depletion (E/D) mode inverter.
Abstract:
An oxide semiconductor and a thin film transistor (TFT) including the same. The oxide semiconductor may be obtained by adding hafnium (Hf) to gallium-indium-zinc oxide (GIZO) and may be used as a channel material of the TFT.
Abstract:
A method of operating inverter may include providing a load transistor and a driving transistor connected to the load transistor wherein at least one of the load transistor and the driving transistor has a double gate structure, and varying a threshold voltage of the at least one of the load transistor and the driving transistor having the double gate structure. A threshold voltage of the load transistor or the driving transistor may be adjusted by the double gate structure, and accordingly, the inverter may be an enhancement/depletion (E/D) mode inverter.
Abstract:
Provided are an inverter, a method of operating the inverter, and a logic circuit including the inverter. The inverter may include a load transistor and a driving transistor, and at least one of the load transistor and the driving transistor may have a double gate structure. A threshold voltage of the load transistor or the driving transistor may be adjusted by the double gate structure, and accordingly, the inverter may be an enhancement/depletion (E/D) mode inverter.
Abstract:
An oxide semiconductor and a thin film transistor (TFT) including the same. The oxide semiconductor may be obtained by adding hafnium (Hf) to gallium-indium-zinc oxide (GIZO) and may be used as a channel material of the TFT.
Abstract:
A method of operating inverter may include providing a load transistor and a driving transistor connected to the load transistor wherein at least one of the load transistor and the driving transistor has a double gate structure, and varying a threshold voltage of the at least one of the load transistor and the driving transistor having the double gate structure. A threshold voltage of the load transistor or the driving transistor may be adjusted by the double gate structure, and accordingly, the inverter may be an enhancement/depletion (E/D) mode inverter.
Abstract:
Methods of forming masks. According to the methods, a target pattern is set. Generation of a side lobe caused by the target pattern is verified. A preliminary target pattern and a preliminary side lobe pattern are set, in the target pattern and a region where the side lobe is generated, respectively. An interference pattern map using the preliminary target pattern and the preliminary side lobe pattern is created. At least one of regions having a phase identical or opposite to that of a position of the preliminary target pattern in the interference pattern map is set to an interference auxiliary pattern. A mask using the interference auxiliary pattern and the target pattern is formed.
Abstract:
Provided is a scalable encoding method, apparatus, and medium. The method includes: encoding a base layer and encoding a first enhancement layer and a second enhancement layer in a frame having the base layer; and generating an encoded frame by synthesizing the encoded results. Accordingly, only if the loss of the encoding frame is not as great as the encoded first enhancement layer is damaged, a case where speech restoration with respect to partial frequency bands must be given up does not occur. Furthermore, since an encoder divides the second enhancement layer into a plurality of layers in a horizontal or vertical direction, considering a distribution pattern of data belonging to the second enhancement layer and first encodes a layer in which lots of data are distributed among the divided layers, loss of audio information can be minimized even if a portion of the encoded second enhancement layer is damaged.