公开(公告)号：US10084310B1

公开(公告)日：2018-09-25

申请号：US15426844

申请日：2017-02-07

申请人： Sandia Corporation

发明人： Jason C. Neely ,  Joshua Stewart ,  Jarod James Delhotal ,  Jack David Flicker ,  Geoff L. Brennecka

IPC分类号： H01L23/34 ,  H02J1/02 ,  H01L29/16 ,  H02M7/00 ,  B60L11/18 ,  B60R16/03

CPC分类号： H02J1/02 ,  B60R16/03 ,  H01L29/1608 ,  H02J1/06 ,  H02M7/003 ,  Y02E10/56 ,  Y02T10/7005 ,  Y02T10/7022 ,  Y02T10/7241 ,  Y02T10/92 ,  Y10S903/00

摘要： A DC power bus having reduced parasitic inductance and higher tolerable operating temperature is disclosed. In example embodiments, a bus structure overlies a printed circuit board, and an array of capacitors is arranged on a surface of the printed circuit board distal the bus structure. The bus structure comprises an upper metal plate, a lower metal plate, and a dielectric film interposed between the upper and lower metal plates. The capacitors are connected in parallel between conductive planes of the printed circuit board. The upper and lower metal plates of the bus structure are connected to respective conductive planes of the printed circuit board.