DISPLAY DRIVING CIRCUIT AND METHOD OF OPERATING SAME

    公开(公告)号:US20230410708A1

    公开(公告)日:2023-12-21

    申请号:US18241177

    申请日:2023-08-31

    CPC classification number: G09G3/20 G09G2330/021 G09G2310/08 G09G2310/0275

    Abstract: A display apparatus including a display driving circuit and a display panel is provided. The display driving circuit, connected to a display panel including a plurality of pixel groups, includes a controller configured to determine a driving order of each of the plurality of pixel groups in a first horizontal period and to generate image data and a selection signal in a first voltage range, a data driver configured to generate an image signal on the basis of the image data and to transfer the image signal to the plurality of data lines in the first horizontal period, a plurality of output pads respectively connected to the plurality of pixel groups through the plurality of data lines, and a data switching circuit configured to provide the image signal to the display panel through at least one of the plurality of output pads based on the selection signal.

    DISPLAY APPARATUS INCLUDING DISPLAY DRIVING CIRCUIT AND DISPLAY PANEL

    公开(公告)号:US20220262292A1

    公开(公告)日:2022-08-18

    申请号:US17589997

    申请日:2022-02-01

    Abstract: A display apparatus including a display driving circuit and a display panel is provided. The display driving circuit, connected to a display panel including a plurality of pixel groups, includes a controller configured to determine a driving order of each of the plurality of pixel groups in a first horizontal period and to generate image data and a selection signal in a first voltage range, a data driver configured to generate an image signal on the basis of the image data and to transfer the image signal to the plurality of data lines in the first horizontal period, a plurality of output pads respectively connected to the plurality of pixel groups through the plurality of data lines, and a data switching circuit configured to provide the image signal to the display panel through at least one of the plurality of output pads based on the selection signal.

    DISPLAY DRIVING CIRCUIT AND DISPLAY DEVICE INCLUDING THE SAME

    公开(公告)号:US20220383790A1

    公开(公告)日:2022-12-01

    申请号:US17745246

    申请日:2022-05-16

    Abstract: Provided is a display driving circuit including a plurality of source channels configured to provide data voltages to a plurality of data lines of a display panel, respectively; a dummy channel on one side of at least one of the source channels; and control logic configured to control operations of the source channels and the dummy channel, wherein, when failure of a first source channel from among the source channels is determined, the control logic is further configured to provide data voltages to data lines corresponding to the first source channel and second source channels, respectively, which are between the first source channel and the dummy channel, by using the second source channels and the dummy channel.

    DISPLAY DRIVING INTEGRATED CIRCUIT AND DISPLAY DEVICE INCLUDING THE SAME

    公开(公告)号:US20210264860A1

    公开(公告)日:2021-08-26

    申请号:US17026639

    申请日:2020-09-21

    Abstract: A display driving integrated circuit includes a timing controller, a first source driver including a first inverting input, a first non-inverting input, and a first output, a second source driver including a second inverting input, a second non-inverting input, and a second output, and a switching circuit connected with the display panel through a first and second pads. Under control of the timing controller, the switching circuit performs one of a first switching operation of connecting the first inverting input and the first output with the first pad, connecting the second inverting input and the second output with the second pad, and applying first and second decoding voltages to the non-inverting inputs, respectively; and a second switching operation of applying a sensing reference voltage to the non-inverting inputs, and connecting the output terminals with an output node, and connecting the inverting inputs with one pad.

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