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公开(公告)号:US20240211177A1
公开(公告)日:2024-06-27
申请号:US18345492
申请日:2023-06-30
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Wonik SEO , Dong-Uk RYU , Sungduk CHO
IPC: G06F3/06
CPC classification number: G06F3/0665 , G06F3/0604 , G06F3/0673
Abstract: A method including updating memory allocation information of a UVM based on block information of model data blocks used for an execution of a deep learning model by a deep learning framework, and performing a least recently used (LRU) eviction based on the updated memory allocation information.
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公开(公告)号:US20250094346A1
公开(公告)日:2025-03-20
申请号:US18964849
申请日:2024-12-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Wonik SEO , Dong-uk RYU , Sungduk CHO
IPC: G06F12/08
Abstract: A method and apparatus for managing a unified virtual memory (UVM) are provided. The UVM is backed by a main processor memory and a coprocessor memory, and the method includes: checking properties of data blocks of the UVM used to execute a deep learning model; based on a first of the data blocks storing weight data of the deep learning model, storing the first data block in the main processor memory among the main processor memory and the coprocessor memory; and performing an operation of the deep learning model based on the first data block using a coprocessor while directly loading at least a portion of the first data block from the main processor memory into a cache memory of the coprocessor without migration of the first data block from the main processor memory to the coprocessor memory.
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公开(公告)号:US20240220407A1
公开(公告)日:2024-07-04
申请号:US18343099
申请日:2023-06-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Wonik SEO , Dong-uk RYU , Sungduk CHO
IPC: G06F12/08 , G06N3/0455 , G06N3/084
CPC classification number: G06F12/08 , G06N3/0455 , G06N3/084
Abstract: A method and apparatus for managing a unified virtual memory (UVM) are provided. The UVM is backed by a main processor memory and a coprocessor memory, and the method includes: checking properties of data blocks of the UVM used to execute a deep learning model; based on a first of the data blocks storing weight data of the deep learning model, storing the first data block in the main processor memory among the main processor memory and the coprocessor memory; and performing an operation of the deep learning model based on the first data block using a coprocessor while directly loading at least a portion of the first data block from the main processor memory into a cache memory of the coprocessor without migration of the first data block from the main processor memory to the coprocessor memory.
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