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    MEMORY STORAGE DEVICE AND WEAR LEVELING METHOD THEREOF
    1.
    发明公开
    MEMORY STORAGE DEVICE AND WEAR LEVELING METHOD THEREOF 审中-公开

    公开(公告)号：US20240264932A1

    公开(公告)日：2024-08-08

    申请号：US18237735

    申请日：2023-08-24

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sanghoon YOO ,  Wan-Soo CHOI ,  Hee Yeon TAK

    IPC: G06F12/02

    CPC classification number: G06F12/0246 ,  G06F2212/7211

    Abstract: A memory storage device is provided. The memory storage device includes: a memory device including a plurality of blocks, the plurality of blocks including a first block which includes a plurality of sub-blocks; and a memory controller configured to, based on use amount differences among the plurality of sub-blocks being greater than a threshold value, increase a use amount of a low use sub-block that has a small use amount from among the plurality of sub-blocks of the first block. The plurality of sub-blocks of the respective blocks are stacked in a direction perpendicular to a substrate of the memory device.

    STORAGE DEVICE AND AN OPERATING METHOD OF A STORAGE CONTROLLER
    2.
    发明公开
    STORAGE DEVICE AND AN OPERATING METHOD OF A STORAGE CONTROLLER 审中-公开

    公开(公告)号：US20240264766A1

    公开(公告)日：2024-08-08

    申请号：US18417297

    申请日：2024-01-19

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Wan-Soo CHOI ,  Sang Hoon YOO ,  Young Sun YOUN ,  Young Ick CHO

    IPC: G06F3/06

    CPC classification number: G06F3/0655 ,  G06F3/0604 ,  G06F3/064 ,  G06F3/0679

    Abstract: A storage device and an operating method of a storage controller are provided. The storage device comprises a non-volatile memory device, each including a plurality of physical blocks, the physical block includes a plurality of sub-blocks and a storage controller including a free block list and a victim selectable block list for the plurality of physical blocks. The storage controller configured to check full reusable physical blocks in the free block list and select a head of the checked block when there are not enough free blocks for storing data in response to a write request received from a host. The storage controller further configured to perform a garbage collection based on the victim selectable block list and to transmit an address of the physical block subjected to the garbage collection to the non-volatile memory device together with the write request.

    MULTI-BIT MEMORY DEVICE AND ON-CHIP BUFFERED PROGRAM METHOD THEREOF
    4.
    发明申请
    MULTI-BIT MEMORY DEVICE AND ON-CHIP BUFFERED PROGRAM METHOD THEREOF 有权
    多位存储器件和片上缓存程序方法

    公开(公告)号：US20150046638A1

    公开(公告)日：2015-02-12

    申请号：US14451953

    申请日：2014-08-05

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Wan-Soo CHOI ,  Taec-Jun KIM ,  Sang-Wook NAM ,  Jae-Hwa LEE

    IPC: G11C16/10

    CPC classification number: G11C11/5628 ,  G11C16/06 ,  G11C16/10 ,  G11C16/3418

    Abstract: A program method of a multi-bit memory device is provided. First page data is programmed in a first region of a memory cell array. The first page data is stored in a first buffer of a page buffer. Second page data is programmed in the first region of the memory cell array. The second page data is stored in a third buffer of the page buffer. Third page data is stored in the first region of the memory cell array. The second page data stored in the third buffer is transferred to a second buffer of the page buffer and the third page data is stored in the third buffer. The first to third page data stored in page buffer are programmed in a second region of the memory cell array.

    Abstract translation: 提供了一种多位存储器件的编程方法。 第一页数据被编程在存储单元阵列的第一区域中。 第一页数据存储在页缓冲器的第一缓冲器中。 第二页数据被编程在存储单元阵列的第一区域中。 第二页数据存储在页缓冲器的第三缓冲器中。 第三页数据存储在存储单元阵列的第一区域中。 存储在第三缓冲器中的第二页数据被传送到页缓冲器的第二缓冲器，并且第三页数据被存储在第三缓冲器中。 存储在页面缓冲器中的第一到第三页数据被编程在存储单元阵列的第二区域中。

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