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公开(公告)号:US20250105117A1
公开(公告)日:2025-03-27
申请号:US18619711
申请日:2024-03-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sangseok HONG , Jaeseong KIM , Jeongseok KIM , Tae Wook KIM , Yejin LEE , Jooyoung CHOI
IPC: H01L23/498 , H01L23/00 , H01L25/065
Abstract: A semiconductor package may include a semiconductor chip, a redistribution layer on the semiconductor chip, a protection pattern covering the redistribution layer, and a connection terminal on the redistribution layer. The redistribution layer may include a redistribution pad on a top surface of the redistribution layer, and the redistribution pad may include a first pad and a second pad on the first pad. The second pad may have a side surface that is inclined and that extends to a top surface of the first pad, and the protection pattern may be spaced apart from the side surface of the second pad and may have a side surface that is inclined and that extends to the top surface of the first pad.
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公开(公告)号:US20250079319A1
公开(公告)日:2025-03-06
申请号:US18737402
申请日:2024-06-07
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jeongseok KIM , Jaeseong KIM , Tae Wook KIM , Yejin LEE , Jooyoung CHOI , Sangseok HONG
IPC: H01L23/538 , H01L23/00 , H01L23/31 , H01L23/36 , H01L23/49 , H01L23/498 , H01L25/16 , H01Q1/22
Abstract: A semiconductor package may include a first redistribution substrate, a first semiconductor chip disposed on the first redistribution substrate, a second semiconductor chip horizontally spaced apart from the first semiconductor chip, a mold layer provided on the first redistribution substrate to enclose the first and second semiconductor chips, a second redistribution substrate disposed on the mold layer, a connection member, which is provided at a side of the first and second semiconductor chips to connect the first redistribution substrate to the second redistribution substrate, and an antenna substrate attached to the second redistribution substrate using an adhesive layer. The antenna substrate may include a core portion, an antenna pattern provided on a top surface of the core portion, and a wiring pattern provided on a bottom surface of the core portion.
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公开(公告)号:US20250105192A1
公开(公告)日:2025-03-27
申请号:US18635296
申请日:2024-04-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Tae Wook KIM , Jaeseong KIM , Jeongseok KIM , Yejin LEE , Jooyoung CHOI , Sangseok HONG
IPC: H01L23/00 , H01L21/762 , H01L23/498 , H01L23/522 , H01L25/00 , H01L25/18
Abstract: A semiconductor package may include a redistribution layer structure including a redistribution layer, a semiconductor chip a first surface of the redistribution layer structure, an under-bump structure disposed on a second surface of the redistribution layer structure and including a protective layer having a trench and an under-bump metal layer, an electronic element on the under-bump structure, and an underfill member filling at least a portion of a space between the under-bump structure and the electronic element and filling at least a portion of the trench, wherein, in a plan view, the trench surrounds the electronic element and may include a protrusion portion protruding outward from the electronic element in a region surrounding an edge of the electronic element.
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