公开(公告)号：US20140235052A1

公开(公告)日：2014-08-21

申请号：US14183817

申请日：2014-02-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kunsang Park ,  Sukyoung Kim ,  Jisoon Park ,  Ju-Il Choi ,  Byung Lyul Park ,  Gilheyun Choi

IPC: H01L21/768

CPC classification number: H01L21/76864 ,  H01L21/76873 ,  H01L21/76898

Abstract: Methods for fabricating semiconductor devices having through electrodes are provided. The method may comprise forming a via hole which opens towards an upper surface of a substrate and disconnects with a lower surface of the substrate; forming a via isolation layer which extends along an inner surface of the via hole and covers the upper surface of the substrate; forming a seed layer on the via isolation layer which extends along the via isolation layer; annealing the seed layer in-situ after forming the seed layer; forming a conductive layer, filling the via hole, by an electroplating using the seed layer; and planarizing the upper surface of the substrate to form a through electrode surrounded by the via isolation layer in the via hole.

Abstract translation: 提供了具有通孔电极的制造半导体器件的方法。 该方法可以包括形成朝向衬底的上表面打开并且与衬底的下表面断开的通孔; 形成沿所述通孔的内表面延伸并覆盖所述基板的上表面的通孔隔离层; 在沿通孔隔离层延伸的通孔隔离层上形成晶种层; 在形成种子层之后，原位退火晶种层; 通过使用种子层的电镀形成导电层，填充通孔; 并且平坦化衬底的上表面以形成由通孔中的通孔隔离层包围的通孔。

公开(公告)号：US09543200B2

公开(公告)日：2017-01-10

申请号：US14183817

申请日：2014-02-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kunsang Park ,  Sukyoung Kim ,  Jisoon Park ,  Ju-Il Choi ,  Byung Lyul Park ,  Gilheyun Choi

IPC: H01L21/768

CPC classification number: H01L21/76864 ,  H01L21/76873 ,  H01L21/76898

Abstract: Methods for fabricating semiconductor devices having through electrodes are provided. The method may comprise forming a via hole which opens towards an upper surface of a substrate and disconnects with a lower surface of the substrate; forming a via isolation layer which extends along an inner surface of the via hole and covers the upper surface of the substrate; forming a seed layer on the via isolation layer which extends along the via isolation layer; annealing the seed layer in-situ after forming the seed layer; forming a conductive layer, filling the via hole, by an electroplating using the seed layer; and planarizing the upper surface of the substrate to form a through electrode surrounded by the via isolation layer in the via hole.

Abstract translation: 提供了具有通孔电极的制造半导体器件的方法。 该方法可以包括形成朝向衬底的上表面打开并且与衬底的下表面断开的通孔; 形成沿所述通孔的内表面延伸并覆盖所述基板的上表面的通孔隔离层; 在沿通孔隔离层延伸的通孔隔离层上形成晶种层; 在形成种子层之后，原位退火晶种层; 通过使用种子层的电镀形成导电层，填充所述通孔; 并且平坦化衬底的上表面以形成由通孔中的通孔隔离层包围的通孔。