公开(公告)号：US20220208787A1

公开(公告)日：2022-06-30

申请号：US17476711

申请日：2021-09-16

Applicant: Samsung Electronics Co., LTD

Inventor： SUNGKWEON BAEK ,  Hakseon Kim ,  Jaehwa Seo

IPC: H01L27/11582 ,  H01L27/11556 ,  H01L27/11529 ,  H01L27/11573

Abstract: A transistor of a semiconductor device includes an isolation region, an active region disposed in the isolation region, a gate extending in a second direction on the active region, and source and drain regions respectively extending in a first direction perpendicular to the second direction in the active region on first and second sides of the gate. The source and drain regions include low-concentration source and drain doping regions including first and second low-concentration source and drain doping regions The source and drain regions further include high-concentration source and drain doping regions respectively disposed in the low-concentration source and drain doping regions and having higher doping concentrations than the low-concentration source and drain doping regions. A first length in the second direction of the first low-concentration source and drain doping regions is greater than a second length in the second direction of the second low-concentration source and drain doping regions.

公开(公告)号：US20220208783A1

公开(公告)日：2022-06-30

申请号：US17387868

申请日：2021-07-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： JAE HWA SEO ,  HAKSEON KIM ,  SUNGKWEON BAEK

IPC: H01L27/11573 ,  H01L27/11556 ,  H01L27/11529 ,  H01L27/11582

Abstract: A semiconductor device and an electronic system including the same are disclosed. The semiconductor device may include a gate electrode on a semiconductor substrate, a gate insulating layer between the gate electrode and the semiconductor substrate, a first epitaxial layer disposed on the semiconductor substrate and at a side of the gate electrode, a second epitaxial layer disposed on the semiconductor substrate and at an opposite side of the gate electrode, a first contact plug in contact with a portion of the first epitaxial layer, and a second contact plug in contact with a portion of the second epitaxial layer. Top surfaces of the first and second epitaxial layers may be located at a level higher than a top surface of the gate electrode.