公开(公告)号：US20210167040A1

公开(公告)日：2021-06-03

申请号：US16906051

申请日：2020-06-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： SE-HO YOU ,  KYUNG SUK OH ,  SUNKYOUNG SEO

IPC: H01L25/065 ,  H01L25/18 ,  H01L21/78 ,  H01L25/00

Abstract: Disclosed is a semiconductor package comprising a first memory chip including a first semiconductor substrate and a first through structure that penetrates the first semiconductor substrate, a second memory chip that directly contacts a top surface of the first memory chip and includes a second semiconductor substrate and a second through structure that penetrates the second semiconductor substrate, a first dummy chip that directly contacts a top surface of the second memory chip and includes a first conductive via, a second dummy chip that directly contacts a top surface of the first dummy chip and includes a second conductive via, and a logic chip in direct contact with a top surface of the second dummy chip. The logic chip is electrically connected to the first through structure through the second conductive via, the first conductive via, and the second through structure.

公开(公告)号：US20220302052A1

公开(公告)日：2022-09-22

申请号：US17834020

申请日：2022-06-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： SE-HO YOU ,  SEONGHO SHIN ,  BANGWEON LEE

IPC: H01L23/66 ,  H01L23/00

Abstract: A semiconductor device may include a substrate, a first semiconductor chip buried in the substrate, a first antenna pattern, a second antenna pattern, and outer terminals. A bottom surface of the substrate may include first and second regions spaced apart from each other. The first semiconductor chip may have a first active surface that is directed to the top surface of a core portion of the substrate. The first antenna pattern may be provided on the top surface of the substrate and electrically connected to the first semiconductor chip. The outer terminals may be provided on the first region of the bottom surface of the substrate, and the second antenna pattern may be provided on the second region of the bottom surface of the substrate.

公开(公告)号：US20210335734A1

公开(公告)日：2021-10-28

申请号：US17121898

申请日：2020-12-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： SE-HO YOU ,  SEONGHO SHIN ,  BANGWEON LEE

IPC: H01L23/66 ,  H01L23/00

Abstract: A semiconductor device may include a substrate, a first semiconductor chip buried in the substrate, a first antenna pattern, a second antenna pattern, and outer terminals. A bottom surface of the substrate may include first and second regions spaced apart from each other. The first semiconductor chip may have a first active surface that is directed to the top surface of a core portion of the substrate. The first antenna pattern may be provided on the top surface of the substrate and electrically connected to the first semiconductor chip. The outer terminals may be provided on the first region of the bottom surface of the substrate, and the second antenna pattern may be provided on the second region of the bottom surface of the substrate.