公开(公告)号：US20230118082A1

公开(公告)日：2023-04-20

申请号：US17967279

申请日：2022-10-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngsub KO ,  Minjun PARK

IPC: G06F17/16

Abstract: An apparatus includes a plurality of registers; a decoding circuit configured to decode a first instruction; and an execution circuit configured to identify, based on the decoded first instruction, a mode, a first register in which first matrix data is stored, a second register in which second matrix data is stored, and a third register in which third matrix data is stored, select a column of the first matrix data and a row of the second matrix data based on the mode, and perform a multiply accumulate (MAC) operation based on the selected column of the first matrix data, the selected row of the second matrix data, and the third matrix data.