公开(公告)号：US20230269943A1

公开(公告)日：2023-08-24

申请号：US18166237

申请日：2023-02-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Siyeong YANG ,  Yuyeon Kim ,  Minjun Oh

IPC: H10B43/27 ,  H10B41/27

CPC classification number: H10B43/27 ,  H10B41/27

Abstract: A method of manufacturing a semiconductor device includes forming a stacked structure in which a plurality of interlayer insulating layers and a plurality of sacrificial layers are alternately stacked on a substrate, etching the stacked structure to form an opening exposing a part of the substrate through the stacked structure, forming a channel layer on a part of the substrate. The forming of the channel layer includes forming a first amorphous silicon layer at a first temperature on the part of the substrate by supplying a silicon source gas and an impurity source gas together and forming a second amorphous silicon layer at a second temperature on the first amorphous silicon layer by supplying the silicon source gas and not supplying the impurity source gas after the forming of the first amorphous silicon layer, and the second temperature is higher than the first temperature.