公开(公告)号：US20240381623A1

公开(公告)日：2024-11-14

申请号：US18412858

申请日：2024-01-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jungha LEE ,  Jiho PARK ,  Seok-Won KIM ,  Sanghyeok YU

IPC: H10B12/00

Abstract: A semiconductor device includes a substrate; a bit line disposed on the substrate and extending in a first direction; a first interlayer insulating layer disposed on the bit line, and including a channel trench extending in a second direction crossing the first direction; a second interlayer insulating layer disposed on the first interlayer insulating layer; a channel pattern disposed in the channel trench; a word line extending in the second direction and spaced apart from the channel pattern; a gate insulating pattern disposed between the channel pattern and the word line; an insulating pattern disposed on the word line; and a landing pad connected to the channel pattern. The landing pad includes a first protrusion disposed between the channel pattern and the second interlayer insulating layer, and a second protrusion disposed between the channel pattern and the insulating pattern.

公开(公告)号：US20220352071A1

公开(公告)日：2022-11-03

申请号：US17856366

申请日：2022-07-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jungha LEE ,  Woojin JANG

IPC: H01L23/528 ,  H01L23/535 ,  H01L21/768

Abstract: An interconnection structure of an integrated circuit semiconductor device includes: a first conductive layer on a semiconductor substrate; an interlayer insulating layer on the first conductive layer and including a trench and a via hole; a via layer in the via hole, the via layer penetrating the interlayer insulating layer through a bottom of the trench to contact the first conductive layer, the via layer including a protrusion protruding to a height greater than a height of the trench; a barrier layer selectively on the bottom and sidewalls of the trench and on sidewalls of the via layer in the trench; a cap layer on a surface of the via layer; and a second conductive layer in the trench on the barrier layer. The cap layer is electrically connected to the first conductive layer through the via layer.

公开(公告)号：US20210159174A1

公开(公告)日：2021-05-27

申请号：US16922334

申请日：2020-07-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jungha LEE ,  Woojin JANG

IPC: H01L23/528 ,  H01L23/535 ,  H01L21/768

Abstract: An interconnection structure of an integrated circuit semiconductor device includes: a first conductive layer on a semiconductor substrate; an interlayer insulating layer on the first conductive layer and including a trench and a via hole; a via layer in the via hole, the via layer penetrating the interlayer insulating layer through a bottom of the trench to contact the first conductive layer, the via layer including a protrusion protruding to a height greater than a height of the trench; a barrier layer selectively on the bottom and sidewalls of the trench and on sidewalls of the via layer in the trench; a cap layer on a surface of the via layer; and a second conductive layer in the trench on the barrier layer. The cap layer is electrically connected to the first conductive layer through the via layer.