公开(公告)号：US12236105B2

公开(公告)日：2025-02-25

申请号：US17934623

申请日：2022-09-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seong-Jin Cho ,  Jung Min You

IPC: G06F3/06

Abstract: A semiconductor memory device includes a memory cell array having a plurality of rows of memory cells therein, and a row hammer handler configured to generate a refresh address when performing a refresh operation on the plurality rows of memory cells. The row hammer handler (RHH) includes a weight distributor configured to: receive a plurality of row addresses, assign a weight to each of the plurality of row addresses thus received, and to generate weight data corresponding to each of the plurality of row addresses. The RHH also includes an aggress address generator configured to determine an aggress address of a row of memory cells based on the weight data, and a refresh address generator configured to receive the aggress address and to generate the refresh address, which includes address information of a memory cell row adjacent the aggress address.

公开(公告)号：US11848043B2

公开(公告)日：2023-12-19

申请号：US17689064

申请日：2022-03-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung Min You ,  Ho-Youn Kim ,  Won-Hyung Song ,  Hi Jung Kim

IPC: G11C11/406 ,  G11C11/408

CPC classification number: G11C11/406 ,  G11C11/4085 ,  G11C11/4087

Abstract: A memory device includes memory cells connected to a first word-line, wherein the memory cells include a data region in which data is stored and a counting value backup region in which the number of times the first word-line is activated is backed up, a counting table for storing a first row address corresponding to the first word-line and a first counting value as a counting result of the number of times the first word-line is activated, and a comparator configured to compare the first counting value with a first backed-up counting value stored in the counting value backup region; and when the first counting value is greater than the first backed-up counting value, back up the first counting value in the counting value backup region, or when the first backed-up counting value is greater than the first counting value, overwrite the first backed-up counting value into the counting table.

公开(公告)号：US12183390B2

公开(公告)日：2024-12-31

申请号：US17953524

申请日：2022-09-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hijung Kim ,  Jung Min You ,  Seong-Jin Cho

IPC: G11C8/00 ,  G11C11/408 ,  G11C11/4096 ,  G11C17/16

Abstract: Disclosed is a memory device which includes a memory core that includes a plurality of memory cells, and control logic that receives a first active command and a first row address from an external device and activates memory cells corresponding to the first row address from among the plurality of memory cells in response to the first active command. The control logic includes registers and counters. The control logic records the first row address in one of the registers, counts an activation count of the first row address by using a first counter of the counters, and counts a lifetime count of the first row address by using a second counter of the counters.

公开(公告)号：US12182416B2

公开(公告)日：2024-12-31

申请号：US17885822

申请日：2022-08-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung Min You ,  Seong-Jin Cho

IPC: G11C11/406 ,  G06F3/06 ,  G06F12/02 ,  G11C7/10

Abstract: According to an embodiment, a memory device includes a memory cell array including a plurality of memory cells; and a control logic which includes a mode register, performs a refresh operation in response to a refresh command, generates an internal mode register write command in response to the refresh command in a first mode, and does not generate the internal mode register write command in response to the refresh command in a second mode.

公开(公告)号：US20230221869A1

公开(公告)日：2023-07-13

申请号：US17934623

申请日：2022-09-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seong-Jin Cho ,  Jung Min You

IPC: G06F3/06

CPC classification number: G06F3/0619 ,  G06F3/0679 ,  G06F3/0653

Abstract: A semiconductor memory device includes a memory cell array having a plurality of rows of memory cells therein, and a row hammer handler configured to generate a refresh address when performing a refresh operation on the plurality rows of memory cells. The row hammer handler (RHH) includes a weight distributor configured to: receive a plurality of row addresses, assign a weight to each of the plurality of row addresses thus received, and to generate weight data corresponding to each of the plurality of row addresses. The RHH also includes an aggress address generator configured to determine an aggress address of a row of memory cells based on the weight data, and a refresh address generator configured to receive the aggress address and to generate the refresh address, which includes address information of a memory cell row adjacent the aggress address.

公开(公告)号：US20250165159A1

公开(公告)日：2025-05-22

申请号：US19028073

申请日：2025-01-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seong-Jin Cho ,  Jung Min You

IPC: G06F3/06

Abstract: A semiconductor memory device includes a memory cell array having a plurality of rows of memory cells therein, and a row hammer handler configured to generate a refresh address when performing a refresh operation on the plurality rows of memory cells. The row hammer handler (RHH) includes a weight distributor configured to: receive a plurality of row addresses, assign a weight to each of the plurality of row addresses thus received, and to generate weight data corresponding to each of the plurality of row addresses. The RHH also includes an aggress address generator configured to determine an aggress address of a row of memory cells based on the weight data, and a refresh address generator configured to receive the aggress address and to generate the refresh address, which includes address information of a memory cell row adjacent the aggress address.

公开(公告)号：US12020742B2

公开(公告)日：2024-06-25

申请号：US17734508

申请日：2022-05-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Won-Hyung Song ,  Jung Min You ,  Seong-Jin Cho

IPC: G11C11/401 ,  G11C11/4072 ,  G11C11/408 ,  G11C11/4091 ,  G11C11/4093 ,  G11C11/4096

CPC classification number: G11C11/4072 ,  G11C11/4085 ,  G11C11/4087 ,  G11C11/4091 ,  G11C11/4093 ,  G11C11/4096

Abstract: Disclosed is a method for accessing memory cells arranged in rows and columns. The method includes activating a specific row of the rows of the memory cells, and flipping data bits stored in memory cells of the specific row in response to determining that concentrated activation occurs at the specific row.