公开(公告)号：US20240074139A1

公开(公告)日：2024-02-29

申请号：US18143314

申请日：2023-05-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongmoo LEE ,  Julpin PARK ,  Jihoon CHANG ,  Dongsik PARK

IPC: H10B12/00 ,  H01L29/78

CPC classification number: H10B12/033 ,  H01L29/7827 ,  H10B12/315

Abstract: A semiconductor memory device including a substrate, a plurality of conductive lines extending in a first horizontal direction on the substrate and spaced apart from each other in a second horizontal direction perpendicular to the first horizontal direction, a first cell stack on each of the plurality of conductive lines and including a plurality of first vertical transistor structures and a plurality of first connection contacts, a second cell stack on the first cell stack and including a plurality of second vertical transistor structures and a plurality of second connection contacts, and a plurality of capacitor structures arranged on the second cell stack and connected to the plurality of first vertical transistor structures and the plurality of second vertical transistor structures.