Abstract:
A storage device includes a controller and nonvolatile memories. The controller receives write commands having virtual stream identifiers (IDs), receives discard commands having the virtual stream IDs, and determines a lifetime of write data to which each of the virtual stream IDs is assigned. The nonvolatile memories are accessed by the controller depending on physical stream IDs. The controller maps the virtual stream IDs and the physical stream IDs based on the lifetime of the write data.
Abstract:
A host includes: an index tree storing an index including information for identifying a versioning key; and an index update buffer storing a write key included in data subject to a write request and the versioning key corresponding to the write key. When a preset update condition is satisfied, the host transfers the versioning key stored in the index update buffer to the index tree, and when the index update buffer requires recovery, the host designates a recovery section of memory of the storage device including data corresponding to the versioning key which has not been updated to the index tree, to be read by a plurality of threads, reads data included in the recovery section from the storage device through the plurality of threads, and inserts the read data into the index update buffer to recover the index update buffer.
Abstract:
A source driver integrated circuit (IC) for driving a flat panel display is provided. The source driver IC includes a first control logic circuit configured to generate first output signals for driving first source lines arranged in a first region of the flat panel display and a second control logic circuit configured to generate second output signals for driving second source lines arranged in a second region of the flat panel display. A first output delay between two adjacent output signals among the first output signals is different from a second output delay between two adjacent output signals among the second output signals.
Abstract:
Disclosed is a method of managing a memory of an electronic device, including: dividing a physical memory into one or more regions including consecutive pages; when there is a memory allocation request of a process or an operating system, allocating a physical memory space to a region including a free page; and configuring a domain by collecting one or more regions having the same characteristic among the regions, to which the memory is allocated.
Abstract:
A method of processing data in a memory system including a control unit and a hybrid memory device having a first memory and a second memory, includes; receiving first write data, storing the first write data in the first memory and assigning a first group state from among a plurality of group states to the stored first write data in response to first attribution information, completing a data processing operation in the memory system directed to the stored first write data that changes the attribution information associated with the stored first write data by monitoring of the first attribution information using an operating system running on the memory controller, and changing the first group state assigned to the stored first write data to a second group state from among the plurality of group states, the second group state having a different priority than a priority for the first group state.
Abstract:
An operational amplifying circuit are provided. The operational amplifying circuit includes a control circuit, pull-up and pull-down transistors, first and second bias circuits, and a bias voltage generating circuit. The control circuit includes first and second input terminals, and is configured to change, when an input voltage transitions to a first level, a voltage level of a pull-up node and a pull-down node to a second level different from the first level. The pull-up transistor provides a power supply voltage to the output terminal. The pull-down transistor connects the output terminal to a ground voltage. The first bias circuit provides a first bias current to the control circuit. The bias voltage generating circuit generates a bias voltage when the voltage level of at least one of the pull-up and pull-down nodes reaches a threshold voltage level, and the second bias circuit provides a second bias current to the control circuit.
Abstract:
Disclosed is a method of managing a memory of an electronic device, including: dividing a physical memory into one or more regions including consecutive pages; when there is a memory allocation request of a process or an operating system, allocating a physical memory space to a region including a free page; and configuring a domain by collecting one or more regions having the same characteristic among the regions, to which the memory is allocated.
Abstract:
A host, a storage system, and an operating method of the host are provided. The host includes a host memory configured to store a tree structure including a leaf node and an index node, an index management module configured to manage an index based on the tree structure and generate a first log corresponding to the leaf node based on a first update request corresponding to a first key-value entry included in the leaf node, and a device driver configured to generate a first write command corresponding to the first log and transmit the generated first write command to a key-value storage device, so as to store the first log in the key-value storage device. The index management module is configured to generate a first new key-value entry, the first new-key value entry including a first value updated based on the first update request, as the first log.