公开(公告)号：US20210320015A1

公开(公告)日：2021-10-14

申请号：US17355478

申请日：2021-06-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byoungdeog CHOI ,  Jangseop KIM

IPC: H01L21/56 ,  H01L21/033 ,  H01L21/311

Abstract: A method of fabricating a semiconductor may include forming on a substrate a mold structure including a mold layer, a buffer layer, and a support layer, performing on the mold structure an anisotropic etching process to form a plurality of through holes in the mold structure, and forming a plurality of bottom electrodes in the through holes. The buffer layer has a nitrogen content amount that increases as approaching the support layer from the mold layer. The buffer layer has an oxygen content amount that increases as approaching the mold layer from the support layer.

公开(公告)号：US20200006345A1

公开(公告)日：2020-01-02

申请号：US16257260

申请日：2019-01-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seongmin CHOO ,  Hyukwoo KWON ,  Jangseop KIM

IPC: H01L27/108

Abstract: A semiconductor memory device includes lower electrodes, each of the lower electrodes surrounding an inner space, an upper support layer on top surfaces of the lower electrodes, the upper support layer being on the inner spaces surrounded by the lower electrodes, and an upper electrode on the upper support layer, the upper electrode filling first and second regions, the second region penetrating the upper support layer, and the first region extending from the second region into between the lower electrodes. Each of the lower electrodes includes a first portion overlapping with the first region, a top surface of the first portion being exposed by the upper support layer, and a second portion covered by the upper support layer, a top surface of the second portion being in contact with the upper support layer.