公开(公告)号：US20250165391A1

公开(公告)日：2025-05-22

申请号：US18735671

申请日：2024-06-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin Yong Park ,  Jung Ho Park ,  In-Su Kim ,  Jun Yeong Seok ,  Jae Yong Jeong

IPC: G06F12/02

Abstract: A storage device and an operating method of the storage device are provided. The storage device comprises a non-volatile memory including a virtual block including an L2P pair region storing a pair of a logical page number (LPN) and a physical page number (PPN) (LPN-PPN pair) and a data region storing data addressed to the PPN, a volatile memory including an L2V table storing a virtual block number (VBN) corresponding to the LPN, an L2P cache storing the LPN-PPN pair, and an LPN range map storing a portion of the LPN stored in the L2P pair region of the virtual block, and a controller configured to control the non-volatile memory and the volatile memory.

公开(公告)号：US09396796B2

公开(公告)日：2016-07-19

申请号：US14525768

申请日：2014-10-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Hoon Lee ,  Hyun Seok Kim ,  Sung-Hwan Bae ,  Jong-Nam Baek ,  Jae Yong Jeong

IPC: G11C7/00 ,  G11C16/04 ,  G11C16/06 ,  G11C16/26 ,  G11C29/00

CPC classification number: G11C16/04 ,  G11C16/0483 ,  G11C16/06 ,  G11C16/26 ,  G11C29/00

Abstract: A nonvolatile memory device includes an array of nonvolatile memory cells and a plurality of page buffers configured to receive a plurality of pages of data read from the same page in the array using different read voltage conditions. A control circuit is provided, which is electrically coupled to the plurality of page buffers. The control circuit is configured to perform a test operation by driving the plurality of page buffers with control signals that cause generation within the nonvolatile memory device of a string of XOR data bits, which are derived from a comparison of at least two of the multiple pages of data read from the same page of nonvolatile memory cells using the different read voltage conditions. An input/output device is provided, which is configured to output test data derived from the string of XOR data bits to another device located external to the nonvolatile memory device.

Abstract translation: 非易失性存储器件包括非易失性存储器单元的阵列和多个页缓冲器，其被配置为使用不同的读取电压条件从阵列中的同一页面接收多页数据。 提供了一种控制电路，其电耦合到多个页面缓冲器。 控制电路被配置为通过用控制信号驱动多个页面缓冲器来执行测试操作，该控制信号导致非易失性存储器件内的异或数据位串的产生，这是从多个页面中的至少两个的比较导出的 使用不同的读取电压条件从同一页的非易失性存储单元读取数据。 提供了一种输入/输出设备，其被配置为将从XOR数据位串导出的测试数据输出到位于非易失性存储器件外部的另一个设备。

公开(公告)号：US20150070997A1

公开(公告)日：2015-03-12

申请号：US14525768

申请日：2014-10-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Hoon Lee ,  Hyun Seok Kim ,  Sung-Hwan Bae ,  Jong-Nam Baek ,  Jae Yong Jeong

IPC: G11C16/04 ,  G11C29/00

CPC classification number: G11C16/04 ,  G11C16/0483 ,  G11C16/06 ,  G11C16/26 ,  G11C29/00

Abstract: A nonvolatile memory device includes an array of nonvolatile memory cells and a plurality of page buffers configured to receive a plurality of pages of data read from the same page in the array using different read voltage conditions. A control circuit is provided, which is electrically coupled to the plurality of page buffers. The control circuit is configured to perform a test operation by driving the plurality of page buffers with control signals that cause generation within the nonvolatile memory device of a string of XOR data bits, which are derived from a comparison of at least two of the multiple pages of data read from the same page of nonvolatile memory cells using the different read voltage conditions. An input/output device is provided, which is configured to output test data derived from the string of XOR data bits to another device located external to the nonvolatile memory device.

Abstract translation: 非易失性存储器件包括非易失性存储器单元的阵列和多个页缓冲器，其被配置为使用不同的读取电压条件从阵列中的同一页面接收多页数据。 提供了一种控制电路，其电耦合到多个页面缓冲器。 控制电路被配置为通过用控制信号驱动多个页面缓冲器来执行测试操作，该控制信号导致非易失性存储器件内的异或数据位串的产生，这是从多个页面中的至少两个的比较导出的 使用不同的读取电压条件从同一页的非易失性存储单元读取数据。 提供了一种输入/输出设备，其被配置为将从XOR数据位串导出的测试数据输出到位于非易失性存储器件外部的另一个设备。