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公开(公告)号:US20180068600A1
公开(公告)日:2018-03-08
申请号:US15454062
申请日:2017-03-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kyong Ho KIM , Young Min CHOI , Dong Hoon BAEK , Jae Youl LEE , Hyun Wook LIM
CPC classification number: G09G3/006 , G09G3/2096 , G09G3/3688 , G09G2330/06 , G09G2330/12 , G09G2370/04 , G09G2370/08
Abstract: A display driving device includes a timing controller configured to generate test data having a predetermined periodicity, and a source driver configured to drive source lines of a display panel using the test data, determine that a bit error has been generated when aperiodicity appears in the test data, and measure a bit error rate (BER) based on the bit error.
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公开(公告)号:US20210091922A1
公开(公告)日:2021-03-25
申请号:US16889077
申请日:2020-06-01
Applicant: Samsung Electronics Co., Ltd.
Inventor: Tae-Jin KIM , Jung-Hoon CHUN , Jae Youl LEE , Hyun Wook LIM
Abstract: A signal receiving device may not need to consider jitter characteristics of a received signal by including a transition detecting device which receives first to third input signals having different signal levels for each unit interval, compares whether a signal level of a first differential signal, which is a differential signal between the first input signal and the second input signal among the first to third input signals, is greater than a first reference signal level to output a first comparison signal, and compares whether the signal level of the first differential signal is greater than a second reference signal level different from the first reference signal level to output a second comparison signal, and a clock data recovering device which recovers a clock signal embedded in the first to third input signals on the basis of the first and second comparison signals to output the recovery clock signal.
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公开(公告)号:US20190087373A1
公开(公告)日:2019-03-21
申请号:US15941607
申请日:2018-03-30
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Tae Jin KIM , Hyun Wook LIM , Seong Young RYU , Soo Joo LEE
IPC: G06F13/40 , H03K19/0175
Abstract: A termination circuit is provided. The termination device includes terminals configured to receive a corresponding signal; unit circuits respectively connected to the terminals, the unit circuits each including a unit resistor and a unit switch element connected to each other in series; common mode capacitors; first switch elements respectively connected between each of the unit circuits and a first corresponding common mode capacitor of common mode capacitors, each of the first switch elements being configured to turn on when the corresponding signal is received in a first mode; and second switch elements respectively connected between each of the unit circuits and a second corresponding common mode capacitor of the common mode capacitors, the second switch elements being configured to turn on when the corresponding signal is received in a second mode different from the first mode.
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