公开(公告)号：US20230217647A1

公开(公告)日：2023-07-06

申请号：US17952386

申请日：2022-09-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hongsik CHAE ,  Taekyun Kim ,  Jin-Su Lee ,  Hyo-Sun Min ,  Hyungsuk Jung ,  Jaehyoung Choi ,  Donguk Han

IPC: H01L27/108 ,  H01L49/02

CPC classification number: H01L27/10814 ,  H01L28/90

Abstract: A semiconductor device includes bottom electrodes on a substrate. A supporting pattern is disposed between the bottom electrodes in a plan view. A top electrode covers the bottom electrodes and the supporting pattern. A dielectric layer is disposed between the bottom electrodes and the top electrode and between the supporting pattern and the top electrode. A capping pattern is interposed between the bottom electrodes and the dielectric layer and between the supporting pattern and the dielectric layer. The capping pattern covers at least a portion of a side surface of the supporting pattern and extends to cover a top surface of the supporting pattern and top surfaces of the bottom electrodes.