公开(公告)号：US20230135110A1

公开(公告)日：2023-05-04

申请号：US17940816

申请日：2022-09-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hongrae KIM ,  Hyukwoo KWON

IPC: H01L27/108

Abstract: A semiconductor device includes a gate structure on a substrate, an insulating interlayer on the substrate and covering a sidewall of the gate structure, a capping layer on the gate structure and the insulating interlayer, a wiring on the capping layer, an insulation pattern on a bottom and a sidewall of an opening extending through the wiring and at least an upper portion of the capping layer, and an etch stop layer on the insulation pattern and the wiring. The insulation pattern includes a lower portion on the bottom of the opening and a lateral portion contacting the sidewall of the opening. A thickness of the lower portion of the insulation pattern from the bottom of the opening in a vertical direction is greater than a thickness of the lateral portion of the insulation pattern from the sidewall of the opening in a horizontal direction.

公开(公告)号：US20210159113A1

公开(公告)日：2021-05-27

申请号：US17144226

申请日：2021-01-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Byoungdeog CHOI ,  JungWoo SEO ,  Sangyeon HAN ,  Hyun-Woo CHUNG ,  Hongrae KIM ,  Yoosang HWANG

IPC: H01L21/768 ,  H01L23/498 ,  H01L27/22 ,  H01L27/24 ,  H01L45/00 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L27/108

Abstract: A semiconductor device includes a pair of line patterns disposed on a substrate. A contact plug is disposed between the pair of line patterns and an air gap is disposed between the contact plug and the line patterns. A landing pad extends from a top end of the contact plug to cover a first part of the air gap and an insulating layer is disposed on a second part of the air gap, which is not covered by the landing pad.

公开(公告)号：US20200013668A1

公开(公告)日：2020-01-09

申请号：US16577429

申请日：2019-09-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Byoungdeog CHOI ,  JungWoo SEO ,  Sangyeon HAN ,  Hyun-Woo CHUNG ,  Hongrae KIM ,  Yoosang HWANG

IPC: H01L21/768 ,  H01L23/498 ,  H01L27/22 ,  H01L27/24 ,  H01L45/00 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L27/108

Abstract: A semiconductor device includes bit line structures on a substrate, the bit line structures extending along a first direction and being spaced apart from each other along a second direction perpendicular to the first direction, contact plugs spaced apart from each other along the first direction and being on active regions of the substrate between adjacent bit line structures, a linear spacer on each longitudinal sidewall of a bit line structure, landing pads on the contact plugs, respectively, the landing pads being electrically connected to the contact plugs, respectively, and landing pads that are adjacent to each other along the first direction being offset with respect to each other along the second direction, as viewed in a top view, a conductive pad between each of the contact plugs and a corresponding active region, a vertical axes of the conductive pad and corresponding active region being horizontally offset.