公开(公告)号：US20170287930A1

公开(公告)日：2017-10-05

申请号：US15593494

申请日：2017-05-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changhyun LEE ,  Heonkyu LEE ,  Shinhwan KANG ,  Youngwoo PARK

IPC: H01L27/11582 ,  H01L23/528 ,  H01L27/11565

CPC classification number: H01L27/11582 ,  H01L23/5283 ,  H01L23/535 ,  H01L27/11524 ,  H01L27/11565 ,  H01L27/11568 ,  H01L27/1157 ,  H01L27/11573

Abstract: A three-dimensional (3D) semiconductor device includes a stack structure including electrodes vertically stacked on a substrate, a channel structure coupled to the electrodes to constitute a plurality of memory cells three-dimensionally arranged on the substrate, the channel structure including first vertical channels and second vertical channels penetrating the stack structure and a first horizontal channel disposed under the stack structure to laterally connect the first vertical channels and the second vertical channels to each other, a second horizontal channel having a first conductivity type and connected to a sidewall of the first horizontal channel of the channel structure, and conductive plugs having a second conductivity type and disposed on top ends of the second vertical channels.